static void prvSetupHardware( void ) { /* Configuration taken from the ST code. Set Flash banks size & address */ FMI_BankRemapConfig( 4, 2, 0, 0x80000 ); /* FMI Waite States */ FMI_Config( FMI_READ_WAIT_STATE_2, FMI_WRITE_WAIT_STATE_0, FMI_PWD_ENABLE, FMI_LVD_ENABLE, FMI_FREQ_HIGH ); /* Configure the FPLL = 96MHz, and APB to 48MHz. */ SCU_PCLKDivisorConfig( SCU_PCLK_Div2 ); SCU_PLLFactorsConfig( 192, 25, 2 ); SCU_PLLCmd( ENABLE ); SCU_MCLKSourceConfig( SCU_MCLK_PLL ); WDG_Cmd( DISABLE ); VIC_DeInit(); /* GPIO8 clock source enable, used by the LCD. */ SCU_APBPeriphClockConfig(__GPIO8, ENABLE); GPIO_DeInit(GPIO8); /* GPIO 9 clock source enable, used by the LCD. */ SCU_APBPeriphClockConfig(__GPIO9, ENABLE); GPIO_DeInit(GPIO9); /* Enable VIC clock */ SCU_AHBPeriphClockConfig(__VIC, ENABLE); SCU_AHBPeriphReset(__VIC, DISABLE); /* Peripheral initialisation. */ vParTestInitialise(); }
/******************************************************************************* * Function Name : ENET_InitClocksGPIO * Description : Reset, clocks & GPIO Ethernet Pin initializations * Input : None * Output : None * Return : None *******************************************************************************/ void ENET_InitClocksGPIO(void) { GPIO_InitTypeDef GPIO_Struct; SCU_AHBPeriphClockConfig(__ENET, ENABLE); SCU_AHBPeriphReset(__ENET,DISABLE); SCU_PHYCLKConfig(ENABLE); GPIO_DeInit(GPIO1); GPIO_Struct.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 |GPIO_Pin_3 |GPIO_Pin_4 |GPIO_Pin_7 ; GPIO_Struct.GPIO_Type = GPIO_Type_PushPull; GPIO_Struct.GPIO_Direction = GPIO_PinOutput; GPIO_Struct.GPIO_IPConnected = GPIO_IPConnected_Disable; GPIO_Struct.GPIO_Alternate=GPIO_OutputAlt2; GPIO_Init(GPIO1, &GPIO_Struct); GPIO_DeInit(GPIO5); GPIO_Struct.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_3; GPIO_Struct.GPIO_Type = GPIO_Type_PushPull; GPIO_Struct.GPIO_Direction = GPIO_PinOutput; GPIO_Struct.GPIO_IPConnected = GPIO_IPConnected_Disable; GPIO_Struct.GPIO_Alternate=GPIO_OutputAlt2; GPIO_Init(GPIO5, &GPIO_Struct); }
void systemInit(void) { //Default configuration SCU_MCLKSourceConfig(SCU_MCLK_OSC); //Configure the FMI FMI_Config(FMI_READ_WAIT_STATE_2, FMI_WRITE_WAIT_STATE_0, FMI_PWD_ENABLE, FMI_LVD_ENABLE, FMI_FREQ_HIGH); //Configure PLL factors SCU_PLLFactorsConfig(192, 25, 2); //Enable PLL and wait for the the PLL to lock SCU_PLLCmd(ENABLE); //Set clock dividers SCU_RCLKDivisorConfig(SCU_RCLK_Div1); SCU_HCLKDivisorConfig(SCU_HCLK_Div1); SCU_FMICLKDivisorConfig(SCU_FMICLK_Div1); SCU_PCLKDivisorConfig(SCU_PCLK_Div2); //Switch to PLL clock SCU_MCLKSourceConfig(SCU_MCLK_PLL); //Enable VIC clock SCU_AHBPeriphClockConfig(__VIC, ENABLE); //Reset VIC peripheral VIC_DeInit(); //Assign default vectors VIC_InitDefaultVectors(); }
//----------------------------------------------------------------- void USB_ConfigInit(void) { GPIO_InitTypeDef GPIO_InitStructure; UART1_PutString("\r\n USB init..."); #ifdef MCLK96MHZ //USB clock = MCLK/2 = 48MHz SCU_USBCLKConfig(SCU_USBCLK_MCLK2); #else //USB clock = MCLK = 48MHz SCU_USBCLKConfig(SCU_USBCLK_MCLK); #endif //Enable USB clock SCU_AHBPeriphClockConfig(__USB,ENABLE); SCU_AHBPeriphReset(__USB,DISABLE); SCU_AHBPeriphClockConfig(__USB48M,ENABLE); //Configure GPIO0 (D+ Pull-Up on P0.1) SCU_APBPeriphClockConfig(__GPIO0 ,ENABLE); SCU_APBPeriphReset(__GPIO0,DISABLE); // GPIO_DeInit(P0.1); GPIO_StructInit(&GPIO_InitStructure); GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput; GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1; GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull ; GPIO_InitStructure.GPIO_IPInputConnected = GPIO_IPInputConnected_Enable; GPIO_InitStructure.GPIO_Alternate=GPIO_OutputAlt1; GPIO_Init (GPIO0, &GPIO_InitStructure); // initialize the rx fifo, block UART IRQ geting a byte from fifo fifo_init(&USB_rx_fifo, USB_rxfifobuffer, USB_RX_FIFO_LEN, NO_ITLine, USBLP_ITLine); // initialize txd buffer Buffer_Init(&USB_tx_buffer, USB_tbuffer, USB_TX_BUFFER_LEN); // initialize rxd buffer Buffer_Init(&USB_rx_buffer, USB_rbuffer, USB_RX_BUFFER_LEN); VIC_Config(USBLP_ITLine, VIC_IRQ, PRIORITY_USB); VIC_ITCmd(USBLP_ITLine, ENABLE); USB_Init(); UART1_PutString("ok"); }
static void platform_config_scu() { volatile u16 i = 0xFFFF; while (i-- > 0); // SCU initialization SCU_MCLKSourceConfig(SCU_MCLK_OSC); SCU_PLLFactorsConfig(192,25,2); /* PLL = 96 MHz */ SCU_PLLCmd(ENABLE); /* PLL Enabled */ SCU_MCLKSourceConfig(SCU_MCLK_PLL); /* MCLK = PLL */ SCU_PFQBCCmd( ENABLE ); /* Set the RCLK Clock divider to max speed*/ SCU_RCLKDivisorConfig(SCU_RCLK_Div1); /* Set the PCLK Clock to MCLK/2 */ SCU_PCLKDivisorConfig(SCU_PCLK_Div2); /* Set the HCLK Clock to MCLK */ SCU_HCLKDivisorConfig(SCU_HCLK_Div1); /* Set the BRCLK Clock to MCLK */ SCU_BRCLKDivisorConfig(SCU_BRCLK_Div1); // Enable VIC clock SCU_AHBPeriphClockConfig(__VIC, ENABLE); SCU_AHBPeriphReset(__VIC, DISABLE); // Enable the UART clocks SCU_APBPeriphClockConfig(__UART_ALL, ENABLE); // Enable the timer clocks SCU_APBPeriphClockConfig(__TIM01, ENABLE); SCU_APBPeriphReset(__TIM01, DISABLE); SCU_APBPeriphClockConfig(__TIM23, ENABLE); SCU_APBPeriphReset(__TIM23, DISABLE); // Enable the GPIO clocks SCU_APBPeriphClockConfig(__GPIO_ALL, ENABLE); // Enable the WIU clock SCU_APBPeriphClockConfig(__WIU, ENABLE); SCU_APBPeriphReset(__WIU, DISABLE); // Enable the I2C clocks SCU_APBPeriphClockConfig(__I2C0, ENABLE); SCU_APBPeriphReset(__I2C0, DISABLE); SCU_APBPeriphClockConfig(__I2C1, ENABLE); SCU_APBPeriphReset(__I2C1, DISABLE); // Enable the ADC clocks SCU_APBPeriphClockConfig(__ADC, ENABLE); // Enable the SSP clocks SCU_APBPeriphClockConfig(__SSP0,ENABLE); SCU_APBPeriphReset(__SSP0,DISABLE); SCU_APBPeriphClockConfig(__SSP1,ENABLE); SCU_APBPeriphReset(__SSP1,DISABLE); }
/******************************************************************************* * Function Name : SCU_Configuration * Description : Configure the different system clocks * Input : None * Output : None * Return : None *******************************************************************************/ void SCU_Configuration(void) { /*clock enable for used peripherals*/ SCU_APBPeriphClockConfig(__I2C0,ENABLE); SCU_APBPeriphClockConfig(__I2C1,ENABLE); SCU_APBPeriphClockConfig(__GPIO2, ENABLE); SCU_AHBPeriphClockConfig(__VIC, ENABLE); }
/******************************************************************************* * Function Name : main * Description : Main program * Input : None * Output : None * Return : None *******************************************************************************/ int main(void) { #ifdef DEBUG debug(); #endif SCU_MCLKSourceConfig(SCU_MCLK_OSC); /*Use OSC as the default clock source*/ SCU_PCLKDivisorConfig(SCU_PCLK_Div1); /* ARM Peripheral bus clokdivisor = 1*/ /* source addresses and destination addresses for the Second LLI structure */ Link[0]=(u32)(&Buffer0[12]); Link[1]=(u32)(&Buffer2[0]); /* source addresses and destination addresses for the Third LLI structure */ Link[4]=(u32)(&Buffer0[24]); Link[5]=(u32)(&Buffer3[0]); /*Set the addresses of next linked list for the second LLI structure*/ Link[2]=(u32)(&Link[4]); SCU_AHBPeriphClockConfig(__DMA,ENABLE); /* Enable the clock for DMA*/ DMA_DeInit(); /* DMA default configuration : Reset configuration*/ DMA_Cmd(ENABLE);/*Enable the DMA*/ DMA_StructInit(&DMA_InitStruct); /* Write the first LLI*/ DMA_InitStruct.DMA_Channel_LLstItm=(u32)(&Link[0]); /*Set the addresses of next linked list for the first LLI structure*/ DMA_InitStruct.DMA_Channel_SrcAdd=(u32)(&Buffer0[0]); /* source address for the first LLI structure */ DMA_InitStruct.DMA_Channel_DesAdd=(u32)(&Buffer1[0]); /*Destination address for the first LLI structure */ DMA_InitStruct.DMA_Channel_SrcWidth= DMA_SrcWidth_Word;/* The source bus width is a word" 32 bits"*/ DMA_InitStruct.DMA_Channel_DesWidth= DMA_DesWidth_Word; /* The Destination bus width is a word word*/ DMA_InitStruct.DMA_Channel_FlowCntrl=DMA_FlowCntrlt0_DMA;/* DMA is The flow controller*/ DMA_InitStruct.DMA_Channel_TrsfSize =12; /*transfer size*/ /* Configure the DMA channel1 "the chosen channel to perform the transfer" */ DMA_ChannelSRCIncConfig (DMA_Channel1, ENABLE); DMA_ChannelDESIncConfig (DMA_Channel1, ENABLE); DMA_Init(DMA_Channel1,&DMA_InitStruct);/* update the DMA channel1 registers with the cfirst LLI structure*/ DMA_ChannelCmd (DMA_Channel1,ENABLE);/*Enable the DMA channel*/ /*wait for the fifo to be empty*/ while(DMA_GetChannelActiveStatus(DMA_Channel1)); while(1); }
// Configure the interrupt vector. static void VICConfig(void) { // Enable the AHB (advanced high-performance but) clock for VIC (vectored // interrupt controller). SCU_AHBPeriphClockConfig(__VIC,ENABLE); // Reset the VIC registers (to their default reset values). VIC_DeInit(); // Initialize VICs default vector registers. VIC_InitDefaultVectors(); // Reset the wakeup interrupt unit registers. WIU_DeInit(); }
/* Private functions ---------------------------------------------------------*/ void System_Setup(void) { SCU_MCLKSourceConfig(SCU_MCLK_OSC); SCU_PCLKDivisorConfig(SCU_PCLK_Div2); SCU_PLLFactorsConfig(128,25,4); SCU_PLLCmd(ENABLE); SCU_MCLKSourceConfig(SCU_MCLK_PLL); SCU_APBPeriphClockConfig(__CAN, ENABLE); SCU_APBPeriphClockConfig(__GPIO0, ENABLE); SCU_APBPeriphClockConfig(__GPIO1, ENABLE); SCU_APBPeriphClockConfig(__GPIO3, ENABLE); SCU_APBPeriphClockConfig(__GPIO5, ENABLE); SCU_AHBPeriphClockConfig(__VIC, ENABLE); SCU_APBPeriphReset(__CAN, DISABLE); SCU_APBPeriphReset(__GPIO0, DISABLE); SCU_APBPeriphReset(__GPIO1, DISABLE); SCU_APBPeriphReset(__GPIO3, DISABLE); SCU_APBPeriphReset(__GPIO5, DISABLE); SCU_AHBPeriphReset(__VIC, DISABLE); }