void hw_watchdog_init(void)
{
	struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
	u16 val = readw(&wdog->wcr);
	u16 timeout;

	/*
	 * The timer watchdog can be set between
	 * 0.5 and 128 Seconds. If not defined
	 * in configuration file, sets 128 Seconds
	 */
#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
#define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
#endif
	timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
	val |= WCR_WDZST;
	val &= ~(0xFF << 8);
	val &= ~WCR_WDE;
	val &= ~WCR_WDT;
	val |= SET_WCR_WT(timeout);
	writew(val, &wdog->wcr);

	val |= WCR_WDE;
	writew(val, &wdog->wcr);

	hw_watchdog_reset();
}
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void hw_watchdog_init(void)
{
    struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
    u16 timeout;

    /*
     * The timer watchdog can be set between
     * 0.5 and 128 Seconds. If not defined
     * in configuration file, sets 128 Seconds
     */
#ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
#define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
#endif
    timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
    writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS |
           SET_WCR_WT(timeout), &wdog->wcr);
    hw_watchdog_reset();
}