static int StateAction(StateMem *sm, int load, int data_only)
{
//uint32 NWCIRQCount;
//uint8 NWCRec;
SFORMAT StateRegs[] =
{
SFARRAY(WRAM, WRAM_Size),
SFARRAY(CHRRAM, 8192),
SFARRAY(DRegs, 4),
SFVAR(lreset),
SFVAR(Buffer),
SFVAR(BufferShift),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAPR");
if(load)
{
MMC1MIRROR();
MMC1CHR();
MMC1PRG();
lreset=0; /* timestamp(base) is not stored in save states. */
}
return(ret);
}
static int StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVARN(reg_select, "FM7S"),
SFVARN(wram_control, "FM7W"),
SFARRAYN(sr, 0x10, "FM7SR"),
SFVARN(sr_index, "FM7I"),
SFARRAY(PRGRegs, 3),
SFARRAY(CHRRegs, 8),
SFVAR(Mirroring),
SFARRAY32(vcount, 3),
SFARRAY32(dcount, 3),
SFVAR(IRQa),
SFVAR(IRQCount),
SFARRAY(WRAM, 8192),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAPR");
if(load)
{
SyncCHR();
SyncPRG();
SyncMirroring();
}
return(ret);
}
int CMemMap::StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT MemMapRegs[] =
{
SFVAR(mMikieEnabled),
SFVAR(mSusieEnabled),
SFVAR(mRomEnabled),
SFVAR(mVectorsEnabled),
SFEND
};
std::vector <SSDescriptor> love;
love.push_back(SSDescriptor(MemMapRegs, "MMAP"));
int ret = MDFNSS_StateAction(sm, load, data_only, love);
if(load)
{
// The peek will give us the correct value to put back
uint8 mystate=Peek(0);
// Now set to un-initialised so the poke will set correctly
mSusieEnabled=-1;
mMikieEnabled=-1;
mRomEnabled=-1;
mVectorsEnabled=-1;
// Set banks correctly
Poke(0,mystate);
}
return ret;
}
void CMemMap::StateAction(StateMem *sm, const unsigned load, const bool data_only)
{
SFORMAT MemMapRegs[] =
{
SFVAR(mMikieEnabled),
SFVAR(mSusieEnabled),
SFVAR(mRomEnabled),
SFVAR(mVectorsEnabled),
SFEND
};
MDFNSS_StateAction(sm, load, data_only, MemMapRegs, "MMAP");
if(load)
{
// The peek will give us the correct value to put back
uint8 mystate=Peek(0);
// Now set to un-initialised so the poke will set correctly
mSusieEnabled=-1;
mMikieEnabled=-1;
mRomEnabled=-1;
mVectorsEnabled=-1;
// Set banks correctly
Poke(0,mystate);
}
}
int GBZ80_StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(PC.W),
SFVAR(SP.W),
SFVAR(AF.W),
SFVAR(BC.W),
SFVAR(DE.W),
SFVAR(HL.W),
SFVAR(IFF),
SFVAR(InHALT),
SFVAR(RepeatNextByte),
SFVAR(EI_Delayed),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "CPU");
if(load)
{
}
return(ret);
}
static int StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(z80_runtime),
SFARRAY(CPUExRAM, 16384),
SFVAR(FlashStatusEnable),
SFEND
};
SFORMAT TLCS_StateRegs[] =
{
SFVARN(pc, "PC"),
SFVARN(sr, "SR"),
SFVARN(f_dash, "F_DASH"),
SFARRAY32N(gpr, 4, "GPR"),
SFARRAY32N(gprBank[0], 4, "GPRB0"),
SFARRAY32N(gprBank[1], 4, "GPRB1"),
SFARRAY32N(gprBank[2], 4, "GPRB2"),
SFARRAY32N(gprBank[3], 4, "GPRB3"),
SFEND
};
if(!MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAIN"))
return(0);
if(!MDFNSS_StateAction(sm, load, data_only, TLCS_StateRegs, "TLCS"))
return(0);
if(!MDFNNGPCDMA_StateAction(sm, load, data_only))
return(0);
if(!MDFNNGPCSOUND_StateAction(sm, load, data_only))
return(0);
if(!NGPGfx->StateAction(sm, load, data_only))
return(0);
if(!MDFNNGPCZ80_StateAction(sm, load, data_only))
return(0);
if(!int_timer_StateAction(sm, load, data_only))
return(0);
if(!BIOSHLE_StateAction(sm, load, data_only))
return(0);
if(!FLASH_StateAction(sm, load, data_only))
return(0);
if(load)
{
RecacheFRM();
changedSP();
}
return(1);
}
void MDFNNES_VSUNIStateAction(StateMem *sm, const unsigned load, const bool data_only)
{
SFORMAT StateRegs[]=
{
SFVAR(vsdip), SFVAR(coinon), SFVAR(VSindex),
SFEND
};
MDFNSS_StateAction(sm, load, data_only, StateRegs, "VSUN");
}
static void FDS_StateAction(StateMem *sm, const unsigned load, const bool data_only)
{
unsigned int x;
SFORMAT StateRegs[] =
{
SFARRAY(diskdata[0], 65500),
SFARRAY(diskdata[1], 65500),
SFARRAY(diskdata[2], 65500),
SFARRAY(diskdata[3], 65500),
SFARRAY(diskdata[4], 65500),
SFARRAY(diskdata[5], 65500),
SFARRAY(diskdata[6], 65500),
SFARRAY(diskdata[7], 65500),
SFARRAY(FDSRAM, 32768),
SFARRAY(CHRRAM, 8192),
SFVAR(V4023),
SFVAR(ExLatch),
SFVAR(Control),
SFVAR(IRQCounter),
SFVAR(IRQReload),
SFVAR(IRQControl),
SFVAR(writeskip),
SFVAR(DiskPtr),
SFVAR(DiskSeekIRQ),
SFVAR(DiskWritten),
SFEND
};
if(!load)
{
for(x=0;x<TotalSides;x++)
{
int b;
for(b=0; b<65500; b++)
diskdata[x][b] ^= diskdatao[x][b];
}
}
MDFNSS_StateAction(sm, load, data_only, StateRegs, "FDS");
if(load)
{
setmirror(((Control & 8)>>3)^1);
for(x=0;x<TotalSides;x++)
{
int b;
for(b=0; b<65500; b++)
diskdata[x][b] ^= diskdatao[x][b];
}
}
else
{
for(x=0;x<TotalSides;x++)
int StateAction(StateMem *sm, int load, int data_only, const char *sname)
{
SFORMAT StateRegs[] =
{
SFARRAY(mem, mem_size),
SFVAR(prev_sda_in),
SFVAR(prev_scl_in),
SFVAR(phase),
SFVAR(buf),
SFVAR(bitpos),
SFVAR(sda_out),
SFVAR(slave_addr),
SFVAR(rw_bit),
SFVAR(mem_addr),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, sname);
if(load)
{
mem_addr &= (mem_size - 1);
}
return(ret);
}
int MDFNNES_VSUNIStateAction(StateMem *sm, int load, int state_only)
{
SFORMAT StateRegs[]=
{
SFVAR(vsdip), SFVAR(coinon), SFVAR(VSindex),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, state_only, StateRegs, "VSUN");
return(ret);
}
static int StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(PRGBank32),
SFVAR(CHRBank8),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAPR");
if(load)
Sync();
return(ret);
}
void z80_state_action(StateMem *sm, const unsigned load, const bool data_only, const char *section_name)
{
uint8 r_register;
SFORMAT StateRegs[] =
{
SFVARN(z80.af.w, "AF"),
SFVARN(z80.bc.w, "BC"),
SFVARN(z80.de.w, "DE"),
SFVARN(z80.hl.w, "HL"),
SFVARN(z80.af_.w, "AF_"),
SFVARN(z80.bc_.w, "BC_"),
SFVARN(z80.de_.w, "DE_"),
SFVARN(z80.hl_.w, "HL_"),
SFVARN(z80.ix.w, "IX"),
SFVARN(z80.iy.w, "IY"),
SFVARN(z80.i, "I"),
SFVARN(z80.sp.w, "SP"),
SFVARN(z80.pc.w, "PC"),
SFVARN(z80.iff1, "IFF1"),
SFVARN(z80.iff2, "IFF2"),
SFVARN(z80.im, "IM"),
SFVARN(r_register, "R"),
SFVARN(z80.interrupts_enabled_at, "interrupts_enabled_at"),
SFVARN(z80.halted, "halted"),
SFVAR(z80_tstates),
SFVAR(last_z80_tstates),
SFEND
};
if(!load)
r_register = (z80.r7 & 0x80) | (z80.r & 0x7f);
MDFNSS_StateAction(sm, load, data_only, StateRegs, section_name);
if(load)
{
if(load < 0x00093902)
z80.interrupts_enabled_at = z80_tstates;
// TODO: Maybe adjust this check if we ever add emulation of a Z80-utilizing system with long wait-stating.
if((z80_tstates - last_z80_tstates) > 1000)
last_z80_tstates = z80_tstates - 1000;
z80.r7 = r_register & 0x80;
z80.r = r_register & 0x7F;
}
}
virtual int StateAction(StateMem *sm, int load, int data_only, const char *section_name)
{
SFORMAT StateRegs[] =
{
SFVAR(buttons),
SFVAR(old_raw_buttons),
SFVAR(mode1),
SFVAR(mode2),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, section_name);
return(ret);
}
int z80_state_action(StateMem *sm, int load, int data_only, const char *section_name)
{
uint8 r_register;
SFORMAT StateRegs[] =
{
SFVARN(z80.af.w, "AF"),
SFVARN(z80.bc.w, "BC"),
SFVARN(z80.de.w, "DE"),
SFVARN(z80.hl.w, "HL"),
SFVARN(z80.af_.w, "AF_"),
SFVARN(z80.bc_.w, "BC_"),
SFVARN(z80.de_.w, "DE_"),
SFVARN(z80.hl_.w, "HL_"),
SFVARN(z80.ix.w, "IX"),
SFVARN(z80.iy.w, "IY"),
SFVARN(z80.i, "I"),
SFVARN(z80.sp.w, "SP"),
SFVARN(z80.pc.w, "PC"),
SFVARN(z80.iff1, "IFF1"),
SFVARN(z80.iff2, "IFF2"),
SFVARN(z80.im, "IM"),
SFVARN(r_register, "R"),
SFVARN(z80.interrupts_enabled_at, "interrupts_enabled_at"),
SFVARN(z80.halted, "halted"),
SFVAR(z80_tstates),
SFVAR(last_z80_tstates),
SFEND
};
if(!load)
r_register = (z80.r7 & 0x80) | (z80.r & 0x7f);
if(!MDFNSS_StateAction(sm, load, data_only, StateRegs, section_name))
{
return(0);
}
if(load)
{
z80.r7 = r_register & 0x80;
z80.r = r_register & 0x7F;
}
return(1);
}
static int StateAction(int w, StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(pprsb[w]),
SFVAR(pprdata[w]),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, w ? "INP1" : "INP0");
if(load)
{
}
return(ret);
}
int HuC_StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFARRAY(PopRAM, IsPopulous ? 32768 : 0),
SFARRAY(TsushinRAM, IsTsushin ? 32768 : 0),
SFARRAY(SaveRAM, (IsPopulous || IsTsushin || BRAM_Disabled) ? 0 : 2048),
SFARRAY(CDRAM, CDRAM ? (8192 * 8) : 0),
SFARRAY(SysCardRAM, SysCardRAM ? (8192 * 24) : 0),
SFVAR(HuCSF2Latch),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "HuC");
if(load)
HuCSF2Latch &= 0xF;
if(PCE_IsCD)
{
if(arcade_card)
ret &= arcade_card->StateAction(sm, load, data_only);
ret &= PCECD_StateAction(sm, load, data_only);
}
if(mcg)
ret &= mcg->StateAction(sm, load, data_only);
return(ret);
}
static int StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFARRAY(BaseRAM, IsSGX? 32768 : 8192),
SFVAR(PCEIODataBuffer),
SFEND
};
//for(int i = 8192; i < 32768; i++)
// if(BaseRAM[i] != 0xFF)
// printf("%d %02x\n", i, BaseRAM[i]);
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAIN");
ret &= HuC6280_StateAction(sm, load, data_only);
ret &= VDC_StateAction(sm, load, data_only);
ret &= psg->StateAction(sm, load, data_only);
ret &= INPUT_StateAction(sm, load, data_only);
ret &= HuC_StateAction(sm, load, data_only);
if(load)
{
}
return(ret);
}
void HuC_StateAction(StateMem *sm, const unsigned load, const bool data_only)
{
SFORMAT StateRegs[] =
{
SFARRAY(PopRAM, IsPopulous ? 32768 : 0),
SFARRAY(TsushinRAM, IsTsushin ? 32768 : 0),
SFARRAY(SaveRAM, (IsPopulous || IsTsushin || BRAM_Disabled) ? 0 : 2048),
SFARRAY(CDRAM, CDRAM ? (8192 * 8) : 0),
SFARRAY(SysCardRAM, SysCardRAM ? (8192 * 24) : 0),
SFVAR(HuCSF2Latch),
SFEND
};
MDFNSS_StateAction(sm, load, data_only, StateRegs, "HuC");
if(load)
HuCSF2Latch &= 0xF;
if(PCE_IsCD)
{
if(arcade_card)
arcade_card->StateAction(sm, load, data_only);
PCECD_StateAction(sm, load, data_only);
}
if(mcg)
mcg->StateAction(sm, load, data_only);
}
static int StateActionFC(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(QZValR),
SFVAR(QZVal),
SFVAR(FunkyMode),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "INPF");
if(load)
{
}
return(ret);
}
static void StateAction(StateMem *sm, const unsigned load, const bool data_only)
{
SFORMAT StateRegs[] =
{
SFARRAY(BaseRAM, IsSGX? 32768 : 8192),
SFVAR(PCEIODataBuffer),
SFEND
};
//for(int i = 8192; i < 32768; i++)
// if(BaseRAM[i] != 0xFF)
// printf("%d %02x\n", i, BaseRAM[i]);
MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAIN");
HuC6280_StateAction(sm, load, data_only);
VDC_StateAction(sm, load, data_only);
psg->StateAction(sm, load, data_only);
INPUT_StateAction(sm, load, data_only);
HuC_StateAction(sm, load, data_only);
if(load)
{
}
}
int HuC_StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFARRAY(ROMSpace + 0x40 * 8192, IsPopulous ? 32768 : 0),
SFARRAY(TsushinRAM, IsTsushin ? 32768 : 0),
SFARRAY(SaveRAM, (IsPopulous || IsTsushin) ? 0 : 2048),
SFARRAY(ROMSpace + 0x68 * 8192, PCE_IsCD ? 262144 : 0),
SFVAR(HuCSF2Latch),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "HuC");
if(load)
HuCSF2Latch &= 0x3;
if(PCE_IsCD)
{
ret &= PCECD_StateAction(sm, load, data_only);
if(arcade_card)
ret &= arcade_card->StateAction(sm, load, data_only);
}
return(ret);
}
int MCGenjin::StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(bank_select),
SFVAR(dlr),
SFEND
};
int ret = 1;
ret &= MDFNSS_StateAction(sm, load, data_only, StateRegs, "MCGENJIN");
for(unsigned i = 0; i < 2; i++)
ret &= MDFNSS_StateAction(sm, load, data_only, StateRegs, i ? "MCGENJIN_CS1" : "MCGENJIN_CS0");
return ret;
}
static int StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(SoftResetCount),
SFVAR(sms.cycle_counter),
SFARRAYN(sms.wram, 0x2000, "RAM"),
SFVAR(sms.paused),
SFVAR(input.pad[0]),
SFVAR(input.pad[1]),
SFVAR(input.analog[0]),
SFVAR(input.analog[1]),
SFVAR(input.system),
SFVAR(sms.fm_detect),
SFVAR(sms.memctrl),
//SFVAR(z80_runtime),
//SFARRAY(CPUExRAM, 16384),
//SFVAR(FlashStatusEnable),
SFEND
};
int ret = 1;
ret &= MDFNSS_StateAction(sm, load, data_only, StateRegs, "MAIN");
ret &= z80_state_action(sm, load, data_only, "Z80");
ret &= SMS_CartStateAction(sm, load, data_only);
ret &= SMS_PIOStateAction(sm, load, data_only);
ret &= SMS_SoundStateAction(sm, load, data_only);
ret &= SMS_VDPStateAction(sm, load, data_only);
if(load)
{
if(sms.cycle_counter > 1000)
{
sms.cycle_counter = 1000;
puts("sms.cycle_counter sanity failed");
}
}
return(ret);
}
static void StateActionFC(StateMem *sm, const unsigned load, const bool data_only)
{
SFORMAT StateRegs[] =
{
SFARRAY(bufit, 0x61),
SFVAR(ksmode),
SFVAR(ksindex),
SFEND
};
MDFNSS_StateAction(sm, load, data_only, StateRegs, "INPF", true);
if(load)
{
}
}
void IRQ_StateAction(StateMem *sm, const unsigned load, const bool data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(Asserted),
SFVAR(Mask),
SFVAR(Status),
SFEND
};
MDFNSS_StateAction(sm, load, data_only, StateRegs, "IRQ");
if(load)
{
Recalc();
}
}
void InputDevice_Gamepad::StateAction(StateMem* sm, const unsigned load, const bool data_only, const char* sname_prefix)
{
SFORMAT StateRegs[] =
{
SFVAR(dtr),
SFARRAY(buttons, sizeof(buttons)),
SFVAR(command_phase),
SFVAR(bitpos),
SFVAR(receive_buffer),
SFVAR(command),
SFARRAY(transmit_buffer, sizeof(transmit_buffer)),
SFVAR(transmit_pos),
SFVAR(transmit_count),
SFEND
};
char section_name[32];
trio_snprintf(section_name, sizeof(section_name), "%s_Gamepad", sname_prefix);
if(!MDFNSS_StateAction(sm, load, data_only, StateRegs, section_name, true) && load)
Power();
else if(load)
{
if((transmit_pos + transmit_count) > sizeof(transmit_buffer))
{
transmit_pos = 0;
transmit_count = 0;
}
}
}
int InputDevice_Gamepad::StateAction(StateMem* sm, int load, int data_only, const char* section_name)
{
SFORMAT StateRegs[] =
{
SFVAR(dtr),
SFARRAY(buttons, sizeof(buttons)),
SFVAR(command_phase),
SFVAR(bitpos),
SFVAR(receive_buffer),
SFVAR(command),
SFARRAY(transmit_buffer, sizeof(transmit_buffer)),
SFVAR(transmit_pos),
SFVAR(transmit_count),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, section_name);
if(load)
{
if(((uint64_t)transmit_pos + transmit_count) > sizeof(transmit_buffer))
{
transmit_pos = 0;
transmit_count = 0;
}
}
return(ret);
}
int WSwan_InterruptStateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(IStatus),
SFVAR(IEnable),
SFVAR(IVectorBase),
SFEND
};
if(!MDFNSS_StateAction(sm, load, data_only, StateRegs, "INTR"))
return(0);
if(load)
RecalcInterrupt();
return(1);
}
int FXTIMER_StateAction(StateMem *sm, int load, int data_only)
{
SFORMAT StateRegs[] =
{
SFVAR(counter),
SFVAR(period),
SFVAR(control),
SFEND
};
int ret = MDFNSS_StateAction(sm, load, data_only, StateRegs, "TIMR");
if(load)
{
}
return(ret);
}
int MDFNNGPCZ80_StateAction(StateMem *sm, int load, int data_only)
{
uint8 r_register;
SFORMAT StateRegs[] =
{
SFVAR(CommByte),
SFVAR(Z80Enabled),
SFVARN(z80.af.w, "AF"),
SFVARN(z80.bc, "BC"),
SFVARN(z80.de, "DE"),
SFVARN(z80.hl, "HL"),
SFVARN(z80.af_, "AF_"),
SFVARN(z80.bc_, "BC_"),
SFVARN(z80.de_, "DE_"),
SFVARN(z80.hl_, "HL_"),
SFVARN(z80.ix, "IX"),
SFVARN(z80.iy, "IY"),
SFVARN(z80.sp, "SP"),
SFVARN(z80.pc, "PC"),
SFVARN(z80.iff1, "IFF1"),
SFVARN(z80.iff2, "IFF2"),
SFVARN(z80.im, "IM"),
SFVARN(r_register, "R"),
SFEND
};
if(!load)
r_register = (z80.r7 & 0x80) | (z80.r & 0x7f);
if(!MDFNSS_StateAction(sm, load, data_only, StateRegs, "Z80"))
{
return(0);
}
if(load)
{
z80.r7 = r_register & 0x80;
z80.r = r_register & 0x7F;
}
return(1);
}
