u8 SII9234_i2c_read(struct i2c_client *client, u8 reg)
{
u8 ret;
u16 ret1;
u8 ret2;
u32 ret3;
if(!MHL_i2c_init)
{
SII_DEV_DBG("I2C not ready");
return 0;
}
i2c_smbus_write_byte(client, reg);
ret = i2c_smbus_read_byte(client);
//printk("#######Read reg %x data %x\n", reg, ret);
if (ret < 0)
{
SII_DEV_DBG("i2c read fail");
return -EIO;
}
return ret;
}
u8 sii9234_i2c_read(struct i2c_client *client, u8 reg)
{
u8 ret;
if (!mhl_i2c_init) {
SII_DEV_DBG("I2C not ready");
return 0;
}
ret = i2c_smbus_write_byte(client, reg);
if (ret < 0) {
printk(KERN_ERR "%s() I2C cmd write error", __func__);
return -EIO;
}
ret = i2c_smbus_read_byte(client);
if (ret < 0) {
SII_DEV_DBG("i2c read fail");
return -EIO;
}
return ret;
}
static int SII9234C_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
SII_DEV_DBG("");
struct SII9234_state *state;
state = kzalloc(sizeof(struct SII9234_state), GFP_KERNEL);
if (state == NULL) {
printk("failed to allocate memory \n");
return -ENOMEM;
}
state->client = client;
i2c_set_clientdata(client, state);
/* rest of the initialisation goes here. */
printk("SII9234C attach success!!!\n");
SII9234C_i2c_client = client;
SII9234C_i2cprobe_status = 1;
if(( SII9234_i2cprobe_status == 1) && ( SII9234A_i2cprobe_status == 1)
&& ( SII9234B_i2cprobe_status == 1) && ( SII9234C_i2cprobe_status == 1))
{
SII9234_i2c_status = 1;
}
int ret;
s3c_gpio_setpull(GPIO_MHL_INT, S3C_GPIO_PULL_NONE);
set_irq_type(IRQ_EINT13, IRQ_TYPE_EDGE_RISING);
s3c_gpio_cfgpin(GPIO_MHL_INT,S3C_GPIO_SFN(0xf));
mdelay(100);
ret = request_irq(IRQ_EINT13, mhl_int_irq_handler, IRQF_DISABLED , "mhl_int", mhl_int_irq_handler);
if (ret)
{
printk("unable to request irq mhl_int err:: %d\n", ret);
return ret;
}
printk("MHL int reques successful %d\n", ret);
sii9234_wq = create_singlethread_workqueue("sii9234_wq");
INIT_WORK(&SiI9234_int_work,SiI9234_interrupt_event_work);
ret = request_irq(MHL_WAKE_UP, mhl_wake_up_irq_handler, IRQF_DISABLED, "mhl_wake_up", (void *) state); // check and study here...
if (ret)
{
printk("unable to request irq mhl_wake_up err:: %d\n", ret);
return ret;
}
return 0;
}
static int SII9234B_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
SII_DEV_DBG("");
struct SII9234_state *state;
state = kzalloc(sizeof(struct SII9234_state), GFP_KERNEL);
if (state == NULL) {
printk("failed to allocate memory \n");
return -ENOMEM;
}
state->client = client;
i2c_set_clientdata(client, state);
/* rest of the initialisation goes here. */
printk("SII9234B attach success!!!\n");
SII9234B_i2c_client = client;
SII9234B_i2cprobe_status = 1;
if(( SII9234_i2cprobe_status == 1) && ( SII9234A_i2cprobe_status == 1)
&& ( SII9234B_i2cprobe_status == 1) && ( SII9234C_i2cprobe_status == 1))
{
SII9234_i2c_status = 1;
}
return 0;
}
static int sii9244B_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct sii9244_state *state;
SII_DEV_DBG("");
state = kzalloc(sizeof(struct sii9244_state), GFP_KERNEL);
if (state == NULL) {
MHL_DEV_INFO("failed to allocate memory \n");
return -ENOMEM;
}
state->client = client;
i2c_set_clientdata(client, state);
/* rest of the initialisation goes here. */
MHL_DEV_INFO("sii9244B attach success!!!\n");
sii9244B_i2c_client = client;
return 0;
}
void SII9234_GPIO_INIT(void)
{
SII_DEV_DBG("");
if (gpio_request(GPIO_HDMI_EN1, "HDMI_EN1"))
printk(KERN_ERR "Filed to request GPIO_HDMI_EN1!\n");
if (gpio_request(GPIO_MHL_RST, "MHL_RST"))
printk(KERN_ERR "Failed to request GPIO_MHL_RST!\n");
}
static int SII9234_i2c_write(struct i2c_client *client, u8 reg, u8 data)
{
if(!MHL_i2c_init)
{
SII_DEV_DBG("I2C not ready");
return 0;
}
return i2c_smbus_write_byte_data(client, reg, data);
}
void SII9234_HW_Off(void)
{
SII_DEV_DBG("");
//s3c_gpio_cfgpin(GPIO_HDMI_EN1, S3C_GPIO_OUTPUT);
//s3c_gpio_setpin(GPIO_HDMI_EN1, 0);
gpio_direction_output(GPIO_HDMI_EN1, GPIO_LEVEL_LOW);
msleep(10);
}
void sii_9234_monitor(unsigned long arg)
{
SII_DEV_DBG("");
//sii9234_polling();
ReadIndexedRegister(INDEXED_PAGE_0, 0x81);
//printk("SII9234_i2c_read INDEXED_PAGE_0: 0x%02x\n", data);
MHL_reg_check.expires = get_jiffies_64() + (HZ*3);
add_timer(&MHL_reg_check);
}
static u8 SII9234_i2c_read(struct i2c_client *client, u8 reg)
{
u8 ret;
if(!MHL_i2c_init)
{
SII_DEV_DBG("I2C not ready");
return 0;
}
ret = i2c_smbus_read_byte_data(client, reg);
if (ret < 0)
{
SII_DEV_DBG("i2c read fail");
return -EIO;
}
return ret;
}
static int sii9244C_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
int ret;
struct sii9244_state *state;
SII_DEV_DBG("");
state = kzalloc(sizeof(struct sii9244_state), GFP_KERNEL);
if (state == NULL) {
MHL_DEV_INFO("failed to allocate memory \n");
return -ENOMEM;
}
state->client = client;
i2c_set_clientdata(client, state);
/* rest of the initialisation goes here. */
MHL_DEV_INFO("sii9244C attach success!!!\n");
sii9244C_i2c_client = client;
msleep(100);
sii9244_wq = create_singlethread_workqueue("sii9244_wq");
INIT_WORK(&sii9244_int_work, sii9244_interrupt_event_work);
/*
ret = request_threaded_irq(MHL_INT_IRQ, NULL, mhl_int_irq_handler,
IRQF_SHARED , "mhl_int", (void *) state);
*/
ret = request_irq(MHL_INT_IRQ,mhl_int_irq_handler,IRQF_TRIGGER_FALLING,
"mhl_int", (void *) state);
if (ret)
{
MHL_DEV_INFO("[SKY_MHL] unable to request irq mhl_int err:: %d\n", ret);
return ret;
}
MHL_DEV_INFO("[SKY_MHL] MHL int reques successful %d\n", ret);
return 0;
}
int SII9234_i2c_write(struct i2c_client *client, u8 reg, u8 data)
{
if(!MHL_i2c_init)
{
SII_DEV_DBG("I2C not ready");
return 0;
}
//printk("#######Write reg %x data %x\n", reg, data);
return i2c_smbus_write_byte_data(client, reg, data);
}
static int SII9234_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
SII_DEV_DBG("");
//int retval;
struct SII9234_state *state;
struct class *mhl_class;
struct device *mhl_dev;
int ret;
state = kzalloc(sizeof(struct SII9234_state), GFP_KERNEL);
if (state == NULL) {
printk("failed to allocate memory \n");
return -ENOMEM;
}
state->client = client;
i2c_set_clientdata(client, state);
/* rest of the initialisation goes here. */
printk("SII9234 attach success!!!\n");
SII9234_i2c_client = client;
MHL_i2c_init = 1;
mhl_class = class_create(THIS_MODULE, "mhl");
if (IS_ERR(mhl_class))
{
pr_err("Failed to create class(mhl)!\n");
}
mhl_dev = device_create(mhl_class, NULL, 0, NULL, "mhl_dev");
if (IS_ERR(mhl_dev))
{
pr_err("Failed to create device(mhl_dev)!\n");
}
if (device_create_file(mhl_dev, &dev_attr_MHD_file) < 0)
printk("Failed to create device file(%s)!\n", dev_attr_MHD_file.attr.name);
SII9234_i2cprobe_status = 1;
if(( SII9234_i2cprobe_status == 1) && ( SII9234A_i2cprobe_status == 1)
&& ( SII9234B_i2cprobe_status == 1) && ( SII9234C_i2cprobe_status == 1))
{
SII9234_i2c_status = 1;
}
return 0;
}
u8 ReadByteTPI (u8 Offset)
{
u8 ret;
ret = i2c_smbus_read_byte_data(SII9234_i2c_client, Offset);
if (ret < 0)
{
SII_DEV_DBG("i2c read fail");
return -EIO;
}
return ret & 0xff;
}
u8 sii9244_i2c_read(struct i2c_client *client, u8 reg)
{
u8 ret;
if(!MHL_i2c_init)
{
SII_DEV_DBG("I2C not ready");
return 0;
}
i2c_smbus_write_byte(client, reg);
ret = i2c_smbus_read_byte(client);
if (ret < 0)
{
SII_DEV_DBG("i2c read fail");
return -EIO;
}
return ret;
}
void SII9234_HW_Reset(void)
{
SII_DEV_DBG("");
gpio_direction_output(GPIO_HDMI_EN1, GPIO_LEVEL_HIGH);
msleep(10);
gpio_direction_output(GPIO_MHL_RST, GPIO_LEVEL_HIGH);
msleep(5);
gpio_direction_output(GPIO_MHL_RST, GPIO_LEVEL_LOW);
msleep(10);
gpio_direction_output(GPIO_MHL_RST, GPIO_LEVEL_HIGH);
msleep(30);
}
static int sii9244_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct sii9244_state *state;
struct class *mhl_class;
struct device *mhl_dev;
//int ret;
SII_DEV_DBG("");
state = kzalloc(sizeof(struct sii9244_state), GFP_KERNEL);
if (state == NULL) {
#ifdef MHL_DEBUG
printk("failed to allocate memory \n");
#endif
return -ENOMEM;
}
state->client = client;
i2c_set_clientdata(client, state);
/* rest of the initialisation goes here. */
#ifdef MHL_DEBUG
printk("sii9244 attach success!!!\n");
#endif
sii9244_i2c_client = client;
MHL_i2c_init = 1;
mhl_class = class_create(THIS_MODULE, "mhl");
if (IS_ERR(mhl_class))
{
pr_err("Failed to create class(mhl)!\n");
}
mhl_dev = device_create(mhl_class, NULL, 0, NULL, "mhl_dev");
if (IS_ERR(mhl_dev))
{
pr_err("Failed to create device(mhl_dev)!\n");
}
if (device_create_file(mhl_dev, &dev_attr_MHD_file) < 0){
#ifdef MHL_DEBUG
printk("Failed to create device file(%s)!\n", dev_attr_MHD_file.attr.name);
#endif
}
return 0;
}
void MHL_HW_Reset(void)
{
SII_DEV_DBG("");
s3c_gpio_cfgpin(GPIO_HDMI_EN1, S3C_GPIO_OUTPUT);
s3c_gpio_setpin(GPIO_HDMI_EN1, 1);
mdelay(200);
s3c_gpio_cfgpin(GPIO_MHL_RST, S3C_GPIO_OUTPUT);
s3c_gpio_setpin(GPIO_MHL_RST, 1);
mdelay(5);
s3c_gpio_setpin(GPIO_MHL_RST, 0);
mdelay(20);
s3c_gpio_setpin(GPIO_MHL_RST, 1);
mdelay(10);
}
static void check_HDMI_signal(unsigned long arg)
{
SII_DEV_DBG("");
//u8 data;
//MHL_HW_Reset();
//sii9234_initial_registers_set();
//startTPI();
//mhl_output_enable();
sii9234_tpi_init();
MHL_reg_check.function = sii_9234_monitor;
MHL_reg_check.expires = get_jiffies_64() + (HZ*3);
add_timer(&MHL_reg_check);
//data=ReadIndexedRegister(INDEXED_PAGE_0, 0x81);
//printk("SII9234_i2c_read INDEXED_PAGE_0: 0x%02x\n", data);
}
static int sii9234_remove(struct platform_device *pdev)
{
struct mhl_dev *mhl_dev = platform_get_drvdata(pdev);
SII_DEV_DBG("");
disable_irq_nosync(gpio_to_irq(mhl_dev->irq_gpio));
disable_irq_nosync(gpio_to_irq(mhl_dev->wake_up_gpio));
i2c_del_driver(&sii9234_i2c_driver);
i2c_del_driver(&sii9234a_i2c_driver);
i2c_del_driver(&sii9234b_i2c_driver);
i2c_del_driver(&sii9234c_i2c_driver);
destroy_workqueue(mhl_dev->sii9234_wq);
kfree(mhl_dev);
return 0;
}
static int sii9234_resume(struct platform_device *pdev)
{
struct mhl_platform_data *mhl_pdata = pdev->dev.platform_data;
int ret;
SII_DEV_DBG("");
#ifdef CONFIG_MHL_SWITCH
ret = gpio_get_value(mhl_pdata->mhl_sel);
if (ret) {
#endif
mhl_pdata->power_onoff(1);
enable_irq(gpio_to_irq(mhl_pdata->mhl_int));
enable_irq(gpio_to_irq(mhl_pdata->mhl_wake_up));
#ifdef CONFIG_MHL_SWITCH
}
#endif
return 0;
}
static int sii9234_suspend(struct platform_device *pdev, pm_message_t state)
{
struct mhl_platform_data *mhl_pdata = pdev->dev.platform_data;
int ret;
SII_DEV_DBG("");
#ifdef CONFIG_MHL_SWITCH
ret = gpio_get_value(mhl_pdata->mhl_sel);
if (ret) {
#endif
mhl_pdata->power_onoff(0);
disable_irq_nosync(gpio_to_irq(mhl_pdata->mhl_int));
disable_irq_nosync(gpio_to_irq(mhl_pdata->mhl_wake_up));
#ifdef CONFIG_MHL_SWITCH
}
#endif
return 0;
}
static int SII9234_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
SII_DEV_DBG("");
//int retval;
struct SII9234_state *state;
state = kzalloc(sizeof(struct SII9234_state), GFP_KERNEL);
if (state == NULL) {
printk("failed to allocate memory \n");
return -ENOMEM;
}
state->client = client;
i2c_set_clientdata(client, state);
/* rest of the initialisation goes here. */
printk("SII9234 attach success!!!\n");
SII9234_i2c_client = client;
MHL_i2c_init = 1;
//schedule_delayed_work(&init_sii9234,5000);
//init_timer(&MHL_reg_check);
//MHL_reg_check.function = check_HDMI_signal;
//MHL_reg_check.expires = get_jiffies_64() + (HZ*10);
//add_timer(&MHL_reg_check);
//MHL_HW_Reset();
//sii9234_initial_registers_set();
//startTPI();
//mhl_output_enable();
return 0;
}
void sii9234_initial_registers_set(void)
{
SII_DEV_DBG("");
/*
SII9234_i2c_write(SII9234_i2c_client, 0x05, 0x01); // Set SW reset
//Power up
SII9234_i2c_write(SII9234A_i2c_client, 0x3D, 0x3F); // Power up CVCC 1.2V core
SII9234_i2c_write(SII9234B_i2c_client, 0x11, 0x01); // Enable TxPLL clock
SII9234_i2c_write(SII9234B_i2c_client, 0x12, 0x15); // Enable Tx clock path & Equalizer
SII9234_i2c_write(SII9234_i2c_client, 0x08, 0x35); // Power up TMDS TX core
//Power up END
//Analog PLL control
SII9234_i2c_write(SII9234B_i2c_client, 0x17, 0x03); // PLL Calrefsel
SII9234_i2c_write(SII9234B_i2c_client, 0x23, 0x6A); // Auto EQ
SII9234_i2c_write(SII9234B_i2c_client, 0x24, 0xAA); // Auto EQ
SII9234_i2c_write(SII9234B_i2c_client, 0x25, 0xCA); // Auto EQ
SII9234_i2c_write(SII9234B_i2c_client, 0x26, 0xEA); // Auto EQ
SII9234_i2c_write(SII9234B_i2c_client, 0x4C, 0xA0); // Manual zone control
SII9234_i2c_write(SII9234B_i2c_client, 0x4D, 0x00); // Pll mode value
SII9234_i2c_write(SII9234_i2c_client, 0x80, 0x14); // Enable Rx PLL clock
SII9234_i2c_write(SII9234B_i2c_client, 0x45, 0x44); // Rx PLL BW value from I2C
SII9234_i2c_write(SII9234_i2c_client, 0xA1, 0xFC); // Tx PLL full BW ~ 400KHz
SII9234_i2c_write(SII9234_i2c_client, 0xA3, 0xFA); // Tx amplitude CLK: 500mV, Data: 800mV
//Analog PLL control END
//CBUS & Discovery
SII9234_i2c_write(SII9234_i2c_client, 0x90, 0x17); // Enable CBUS discovery
SII9234_i2c_write(SII9234_i2c_client, 0x94, 0x66); // 1.8V CBUS VTH & RGND threshold
SII9234_i2c_write(SII9234_i2c_client, 0xA5, 0x1C); // RGND hysterisis
SII9234_i2c_write(SII9234_i2c_client, 0x95, 0x21); // RGND & single discovery attempt
SII9234_i2c_write(SII9234_i2c_client, 0x96, 0x22); // use 1K and 2K setting
SII9234_i2c_write(SII9234_i2c_client, 0x92, 0x86); // MHL CBUS discovery
//SII9234_i2c_write (0xC8, 0x07, 0xF6); // Increase DDC translation layer timer
//SII9234_i2c_write (0xC8, 0x40, 0x02); // CBUS drive strength to 10 (0x2 value)
//CBUS & Discovery END
SII9234_i2c_write(SII9234_i2c_client, 0x0D, 0x1C); // Enable HDMI Trans-code mode & DDC port
SII9234_i2c_write(SII9234_i2c_client, 0x05, 0x04); // Bring out of reset & Enable Auto Soft reset on SCDT = 0
SII9234_i2c_write(SII9234_i2c_client, 0x74, 0xFF); // Clear interrupts
SII9234_i2c_write(SII9234_i2c_client, 0x78, 0x00); // Disable Interrupts
SII9234_i2c_write(SII9234_i2c_client, 0xC7, 0x00); // HW TPI mode
SII9234_i2c_write(SII9234_i2c_client, 0x1A, 0x00); // Enable TMDS output
SII9234_i2c_write(SII9234_i2c_client, 0x1E, 0x00); // Put device in Active mode
SII9234_i2c_write(SII9234_i2c_client, 0x3C, 0x03); // Interrupt Status Setup RSEN and HPD
*/
//u8 data;
// Power Up
SII9234_i2c_write(SII9234A_i2c_client, 0x3D, 0x3F); // Power up CVCC 1.2V core
SII9234_i2c_write(SII9234B_i2c_client, 0x11, 0x01); // Enable TxPLL Clock
SII9234_i2c_write(SII9234B_i2c_client, 0x12, 0x15); // Enable Tx Clock Path & Equalizer
SII9234_i2c_write(SII9234_i2c_client, 0x08, 0x35); // Power Up TMDS Tx Core
SII9234_i2c_write(SII9234B_i2c_client, 0x17, 0x03);
SII9234_i2c_write(SII9234B_i2c_client, 0x1A, 0x20);
SII9234_i2c_write(SII9234B_i2c_client, 0x22, 0x8A);
SII9234_i2c_write(SII9234B_i2c_client, 0x23, 0x6A);
SII9234_i2c_write(SII9234B_i2c_client, 0x24, 0xAA);
SII9234_i2c_write(SII9234B_i2c_client, 0x29, 0xCA);
SII9234_i2c_write(SII9234B_i2c_client, 0x26, 0xEA);
SII9234_i2c_write(SII9234B_i2c_client, 0x4C, 0xA0);
SII9234_i2c_write(SII9234B_i2c_client, 0x4D, 0x00);
SII9234_i2c_write(SII9234_i2c_client, 0x80, 0x14); // Enable Rx PLL Clock Value
SII9234_i2c_write(SII9234B_i2c_client, 0x45, 0x44);
SII9234_i2c_write(SII9234B_i2c_client, 0x31, 0x0A);
//SII9234_i2c_write(SII9234_i2c_client, 0xA0, 0xD0);
SII9234_i2c_write(SII9234_i2c_client, 0xA1, 0xFC);
SII9234_i2c_write(SII9234_i2c_client, 0xA3, 0xFA);
SII9234_i2c_write(SII9234_i2c_client, 0x2B, 0x01);
SII9234_i2c_write(SII9234_i2c_client, 0x91, 0xE5);
SII9234_i2c_write(SII9234_i2c_client, 0xA5, 0x00);
SII9234_i2c_write(SII9234_i2c_client, 0x90, 0x27); // Enable CBUS discovery
SII9234_i2c_write(SII9234_i2c_client, 0x05, 0x04);
SII9234_i2c_write(SII9234_i2c_client, 0x0D, 0x1C); // HDMI Transcode mode enable
/*
SII9234_i2c_read(SII9234A_i2c_client, 0x3D, &data);
printk("SII9234_i2c_read A 0x3D: 0x%02x\n", data);
SII9234_i2c_read(SII9234B_i2c_client, 0x11, &data);
printk("SII9234_i2c_read B 0x11: 0x%02x\n", data);
SII9234_i2c_read(SII9234B_i2c_client, 0x12, &data);
printk("SII9234_i2c_read B 0x12: 0x%02x\n", data);
SII9234_i2c_read(SII9234_i2c_client, 0x08, &data);
printk("SII9234_i2c_read 0x08: 0x%02x\n", data);
SII9234_i2c_read(SII9234_i2c_client, 0x80, &data);
printk("SII9234_i2c_read 0x80: 0x%02x\n", data);
SII9234_i2c_read(SII9234_i2c_client, 0x90, &data);
printk("SII9234_i2c_read 0x90: 0x%02x\n", data);
SII9234_i2c_read(SII9234_i2c_client, 0x0D, &data);
printk("SII9234_i2c_read 0x0D: 0x%02x\n", data);
*/
}
static int sii9244C_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
int ret;
struct sii9244_state *state;
SII_DEV_DBG("");
state = kzalloc(sizeof(struct sii9244_state), GFP_KERNEL);
if (state == NULL) {
#ifdef MHL_DEBUG
printk("failed to allocate memory \n");
#endif
return -ENOMEM;
}
state->client = client;
i2c_set_clientdata(client, state);
/* rest of the initialisation goes here. */
#ifdef MHL_DEBUG
printk("sii9244C attach success!!!\n");
#endif
sii9244C_i2c_client = client;
msleep(100);
sii9244_wq = create_singlethread_workqueue("sii9244_wq");
INIT_WORK(&sii9244_int_work, sii9244_interrupt_event_work);
#ifdef CONFIG_PANTECH_MHL_CABLE_DETECT
INIT_DELAYED_WORK_DEFERRABLE(&sii9244_cable_detect_work.work, is_mhl_cable);
INIT_DELAYED_WORK_DEFERRABLE(&sii9244_cable_connect_work.work, mhl_cable_connect);
#endif
/*
ret = request_threaded_irq(MHL_INT_IRQ, NULL, mhl_int_irq_handler,
IRQF_SHARED , "mhl_int", (void *) state);
*/
ret = request_irq(MHL_INT_IRQ,mhl_int_irq_handler,IRQF_TRIGGER_FALLING,
"mhl_int", (void *) state);
if (ret)
{
#ifdef MHL_DEBUG
printk("[SKY_MHL] unable to request irq mhl_int err:: %d\n", ret);
#endif
return ret;
}
#ifdef MHL_DEBUG
printk("[SKY_MHL] MHL int reques successful %d\n", ret);
#endif
#ifdef CONFIG_PANTECH_MHL_CABLE_DETECT
ret = request_irq((PM8921_IRQ_BASE+PM8921_USBIN_UV_IRQ),pm_uv_irq_handler,IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING|IRQF_SHARED,
"mhl_int", (void *) state);
#endif
return 0;
}
static int sii9244_i2c_probe(struct i2c_client *client, const struct i2c_device_id *id)
{
struct sii9244_state *state;
struct class *mhl_class;
struct device *mhl_dev;
//int ret;
SII_DEV_DBG("");
state = kzalloc(sizeof(struct sii9244_state), GFP_KERNEL);
if (state == NULL) {
MHL_DEV_INFO("failed to allocate memory \n");
return -ENOMEM;
}
state->client = client;
i2c_set_clientdata(client, state);
/* rest of the initialisation goes here. */
MHL_DEV_INFO("sii9244 attach success!!!\n");
sii9244_i2c_client = client;
MHL_i2c_init = 1;
mhl_class = class_create(THIS_MODULE, "mhl");
if (IS_ERR(mhl_class))
{
pr_err("Failed to create class(mhl)!\n");
}
mhl_dev = device_create(mhl_class, NULL, 0, NULL, "mhl_dev");
if (IS_ERR(mhl_dev))
{
pr_err("Failed to create device(mhl_dev)!\n");
}
if (device_create_file(mhl_dev, &dev_attr_MHD_file) < 0){
MHL_DEV_INFO("Failed to create device file(%s)!\n", dev_attr_MHD_file.attr.name);
}
mhl_detect_work_queue = create_singlethread_workqueue("mhl_detect_work_queue");
if( mhl_detect_work_queue == NULL) {
pr_err(KERN_ERR "[SKY_MHL]+%s mhl_detect_work_queue is NULL \n", __FUNCTION__);
}
mhl_ctrl_connect_work_queue = create_singlethread_workqueue("mhl_ctrl_connect_work_queue");
if( mhl_ctrl_connect_work_queue == NULL) {
pr_err(KERN_ERR "[SKY_MHL]+%s mhl_ctrl_connect_work_queue is NULL \n", __FUNCTION__);
}
INIT_DELAYED_WORK_DEFERRABLE(&mhl_ctrl_connect_work, mhl_cable_connect_ctrl);
INIT_DELAYED_WORK_DEFERRABLE(&mhl_detect_work, is_mhl_cable);
INIT_DELAYED_WORK_DEFERRABLE(&mhl_detect_again_work, handle_pm_irq_again);
INIT_DELAYED_WORK_DEFERRABLE(&mhl_boot_work, handle_mhl_at_boot);
//xsemiyas_debug
if (device_create_file(mhl_dev, &dev_attr_hdmid_ready) < 0){
MHL_DEV_INFO("Failed to create device file(%s)!\n", dev_attr_hdmid_ready.attr.name);
}
return 0;
}