Bool
SMILynx_HWInit(ScrnInfoPtr pScrn)
{
SMIPtr pSmi = SMIPTR(pScrn);
SMIRegPtr mode = pSmi->mode;
vgaHWPtr hwp = VGAHWPTR(pScrn);
int vgaIOBase = hwp->IOBase;
int vgaCRIndex = vgaIOBase + VGA_CRTC_INDEX_OFFSET;
int vgaCRData = vgaIOBase + VGA_CRTC_DATA_OFFSET;
ENTER();
if (pSmi->PCIBurst) {
mode->SR17 |= 0x20;
} else {
mode->SR17 &= ~0x20;
}
/* Gamma correction */
if (pSmi->Chipset == SMI_LYNX3DM || pSmi->Chipset == SMI_COUGAR3DR) {
if(pScrn->bitsPerPixel == 8)
mode->SR66 = (mode->SR66 & 0x33) | 0x00; /* Both RAMLUT on, 6 bits-RAM */
else
mode->SR66 = (mode->SR66 & 0x33) | 0x04; /* Both RAMLUT on, Gamma correct ON */
}
/* Program MCLK */
if (pSmi->MCLK > 0)
SMI_CommonCalcClock(pScrn->scrnIndex, pSmi->MCLK,
1, 1, 63, 0, 0,
pSmi->clockRange.minClock,
pSmi->clockRange.maxClock,
&mode->SR6A, &mode->SR6B);
if(!pSmi->useBIOS) {
/* Disable DAC and LCD framebuffer r/w operation */
mode->SR21 |= 0xB0;
/* Power down mode is standby mode, VCLK and MCLK divided by 4 in standby mode */
mode->SR20 = (mode->SR20 & ~0xB0) | 0x10;
/* Set DPMS state to Off */
mode->SR22 |= 0x30;
if (pSmi->Chipset != SMI_COUGAR3DR) {
/* Select no displays */
mode->SR31 &= ~0x07;
/* Disable virtual refresh */
mode->SR31 &= ~0x80;
/* Disable expansion */
mode->SR32 &= ~0x03;
/* Enable autocentering */
if (SMI_LYNXM_SERIES(pSmi->Chipset))
mode->SR32 |= 0x04;
else
mode->SR32 &= ~0x04;
if (pSmi->lcd == 2) /* Panel is DSTN */
mode->SR21 = 0x00;
/* Enable HW LCD power sequencing */
mode->SR34 |= 0x80;
}
/* Disable Vertical Expansion/Vertical Centering/Horizontal Centering */
mode->CR90[0xE] &= ~0x7;
/* use vclk1 */
mode->SR68 = 0x54;
if(pSmi->Dualhead){
/* set LCD to vclk2 */
mode->SR69 = 0x04;
}
/* Disable panel video */
mode->SRA0 = 0;
mode->CR33 = 0;
mode->CR3A = 0;
}
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x17, mode->SR17);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x20, mode->SR20);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21, mode->SR21);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x22, mode->SR22);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x31, mode->SR31);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x32, mode->SR32);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x34, mode->SR34);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x66, mode->SR66);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x68, mode->SR68);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x69, mode->SR69);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x6A, mode->SR6A);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x6B, mode->SR6B);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0xA0, mode->SRA0);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x33, mode->CR33);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x3A, mode->CR3A);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x9E, mode->CR90[0xE]);
LEAVE(TRUE);
}
Bool
SMILynx_HWInit(ScrnInfoPtr pScrn)
{
SMIPtr pSmi = SMIPTR(pScrn);
SMILynxRegPtr mode = pSmi->mode;
vgaHWPtr hwp = VGAHWPTR(pScrn);
int vgaIOBase = hwp->IOBase;
int vgaCRIndex = vgaIOBase + VGA_CRTC_INDEX_OFFSET;
int vgaCRData = vgaIOBase + VGA_CRTC_DATA_OFFSET;
ENTER();
if (pSmi->PCIBurst) {
mode->SR17 |= 0x20;
} else {
mode->SR17 &= ~0x20;
}
/* Gamma correction */
if (pSmi->Chipset == SMI_LYNX3DM || pSmi->Chipset == SMI_COUGAR3DR) {
if(pScrn->bitsPerPixel == 8)
mode->SR66 = (mode->SR66 & 0x33) | 0x00; /* Both RAMLUT on, 6 bits-RAM */
else
mode->SR66 = (mode->SR66 & 0x33) | 0x04; /* Both RAMLUT on, Gamma correct ON */
}
/* Program MCLK */
if (pSmi->MCLK > 0)
SMI_CommonCalcClock(pScrn->scrnIndex, pSmi->MCLK,
1, 1, 63, 0, 0,
pSmi->clockRange.minClock,
pSmi->clockRange.maxClock,
&mode->SR6A, &mode->SR6B);
if(!pSmi->useBIOS) {
/* Disable DAC and LCD framebuffer r/w operation */
mode->SR21 |= 0xB0;
/* Power down mode is standby mode, VCLK and MCLK divided by 4 in standby mode */
mode->SR20 = (mode->SR20 & ~0xB0) | 0x10;
/* Set DPMS state to Off */
// mode->SR22 |= 0x30;
if (pSmi->Chipset != SMI_COUGAR3DR) {
/* Select no displays */
mode->SR31 &= ~0x07;
/* Disable virtual refresh */
mode->SR31 &= ~0x80;
/* Disable expansion */
mode->SR32 &= ~0x03;
/* Enable autocentering */
if (IS_OLDLYNX(pSmi))
mode->SR32 |= 0x04;
else
mode->SR32 &= ~0x04;
if (pSmi->lcd == 2) /* Panel is DSTN */
mode->SR21 = 0x00;
/* Enable HW LCD power sequencing */
mode->SR34 |= 0x80;
}
/* Disable Vertical Expansion/Vertical Centering/Horizontal Centering */
mode->CR90[0xE] &= ~0x7;
/* use vclk1 */
mode->SR68 = 0x54;
if(pSmi->DualView){
/* set LCD to vclk2 */
mode->SR69 = 0x04;
}
/* Disable panel video */
mode->SRA0 = 0;
mode->CR33 = 0;
mode->CR3A = 0;
}
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x17, mode->SR17);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x20, mode->SR20);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x21, mode->SR21);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x22, mode->SR22);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x31, mode->SR31);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x32, mode->SR32);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x34, mode->SR34);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x66, mode->SR66);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x68, mode->SR68);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x69, mode->SR69);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x6A, mode->SR6A);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x6B, mode->SR6B);
VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0xA0, mode->SRA0);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x33, mode->CR33);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x3A, mode->CR3A);
VGAOUT8_INDEX(pSmi, vgaCRIndex, vgaCRData, 0x9E, mode->CR90[0xE]);
/*
Some CRT only bios will set seq 60~ 63 to 0,0,3e,9a which will cause minor ripple effect
By manually set the register value can avoid the ripple
And with dipper experiment , the key register is seq63 , set to 9A you get ripple ,set to 1A you get clear
(data sheet not mentions the seq 63 register )
But still cant sure if 60,61,62 were totally none-releated , so let their hard code be existe
--monk.liu @ 2010-02-24
*/
VGAOUT8_INDEX(pSmi,VGA_SEQ_INDEX,VGA_SEQ_DATA,0x60,0x1);
VGAOUT8_INDEX(pSmi,VGA_SEQ_INDEX,VGA_SEQ_DATA,0x61,0x0);
VGAOUT8_INDEX(pSmi,VGA_SEQ_INDEX,VGA_SEQ_DATA,0x62,0x3e);
VGAOUT8_INDEX(pSmi,VGA_SEQ_INDEX,VGA_SEQ_DATA,0x63,0x1a);//the key modification
LEAVE(TRUE);
}
