/*FUNCTION**********************************************************************
*
* Function Name : SPI_DRV_MasterInitDma
* Description : Initialize a SPI instance for master mode operation with DMA support.
* This function is exactly like the spi_master_init function but in addition, adds DMA support.
* If the user desires to use DMA based transfers, then the user should use this function call
* instead of the spi_master_init function call. Like the spi_master_init,
* this function initializes the run-time state structure to track the ongoing
* transfers, ungates the clock to the SPI module, resets the SPI module, initializes the module
* to user defined settings and default settings, configures the IRQ state structure, enables
* the module-level interrupt to the core, and enables the SPI module.
*
* This init function also configures the DMA module by requesting channels for DMA operation
* and sets a "useDma" flag in the run-time state structure to notify transfer functions
* to use DMA driven operations.
*
*END**************************************************************************/
void SPI_DRV_MasterInitDma(uint32_t instance, spi_master_state_t * spiState)
{
SPI_DRV_MasterInit(instance, spiState);
/* Set the SPI run-time state struct flag to indicate it will use the DMA */
spiState->useDma = true;
/***********************************
* Request DMA channel for RX FIFO
***********************************/
/* This channel transfers data from RX FIFO to receiveBuffer */
if (instance == 0)
{
DMA_DRV_RequestChannel(kDmaAnyChannel, kDmaRequestMux0SPI0Rx, &spiState->dmaReceive);
}
else
{
DMA_DRV_RequestChannel(kDmaAnyChannel, kDmaRequestMux0SPI1Rx, &spiState->dmaReceive);
}
/***********************************
* Request DMA channel for TX FIFO
***********************************/
if (instance == 0)
{
DMA_DRV_RequestChannel(kDmaAnyChannel, kDmaRequestMux0SPI0Tx, &spiState->dmaTransmit);
}
else
{
DMA_DRV_RequestChannel(kDmaAnyChannel, kDmaRequestMux0SPI1Tx, &spiState->dmaTransmit);
}
}
int main (void)
{
uint8_t loopCount = 0;
uint32_t j;
uint32_t failCount = 0;
uint32_t calculatedBaudRate;
spi_master_state_t spiMasterState;
spi_master_user_config_t userConfig =
{
#if FSL_FEATURE_SPI_16BIT_TRANSFERS
.bitCount = kSpi8BitMode,
#endif
.polarity = kSpiClockPolarity_ActiveHigh,
.phase = kSpiClockPhase_FirstEdge,
.direction = kSpiMsbFirst,
.bitsPerSec = TRANSFER_BAUDRATE
};
// Init hardware
hardware_init();
// Init OSA layer.
OSA_Init();
PRINTF("\r\nSPI board to board blocking example");
PRINTF("\r\nThis example run on instance %d", (uint32_t)SPI_MASTER_INSTANCE);
PRINTF("\r\nBe sure master's SPI%d and slave's SPI%d are connected\r\n",
(uint32_t)SPI_MASTER_INSTANCE, (uint32_t)SPI_MASTER_INSTANCE);
// Init and setup baudrate for the master
SPI_DRV_MasterInit(SPI_MASTER_INSTANCE, &spiMasterState);
SPI_DRV_MasterConfigureBus(SPI_MASTER_INSTANCE,
&userConfig,
&calculatedBaudRate);
// Check if the configuration is correct
if (calculatedBaudRate > userConfig.bitsPerSec)
{
PRINTF("\r**Something failed in the master bus config \r\n");
return -1;
}
else
{
PRINTF("\r\nBaud rate in Hz is: %d\r\n", calculatedBaudRate);
}
while(1)
{
// Initialize the source buffer
for (j = 0; j < TRANSFER_SIZE; j++)
{
s_spiSourceBuffer[j] = j+loopCount;
}
// Reset the sink buffer
for (j = 0; j < TRANSFER_SIZE; j++)
{
s_spiSinkBuffer[j] = 0;
}
// Start transfer data to slave
if (SPI_DRV_MasterTransferBlocking(SPI_MASTER_INSTANCE, NULL, s_spiSourceBuffer,
NULL, TRANSFER_SIZE, MASTER_TRANSFER_TIMEOUT) == kStatus_SPI_Timeout)
{
PRINTF("\r\n**Sync transfer timed-out \r\n");
}
// Delay sometime to wait slave receive and send back data
OSA_TimeDelay(500U);
// Start receive data from slave by transmit NULL bytes
if (SPI_DRV_MasterTransferBlocking(SPI_MASTER_INSTANCE, NULL, NULL,
s_spiSinkBuffer, TRANSFER_SIZE, MASTER_TRANSFER_TIMEOUT) == kStatus_SPI_Timeout)
{
PRINTF("\r\n**Sync transfer timed-out \r\n");
}
// Verify the contents of the master sink buffer
// refer to the slave driver for the expected data pattern
failCount = 0; // reset failCount variable
for (j = 0; j < TRANSFER_SIZE; j++)
{
if (s_spiSinkBuffer[j] != s_spiSourceBuffer[j])
{
failCount++;
}
}
// Print out transmit buffer.
PRINTF("\r\nMaster transmit:");
for (j = 0; j < TRANSFER_SIZE; j++)
{
// Print 16 numbers in a line.
if ((j & 0x0F) == 0)
{
PRINTF("\r\n ");
}
PRINTF(" %02X", s_spiSourceBuffer[j]);
}
// Print out receive buffer.
PRINTF("\r\nMaster receive:");
for (j = 0; j < TRANSFER_SIZE; j++)
{
// Print 16 numbers in a line.
if ((j & 0x0F) == 0)
{
PRINTF("\r\n ");
}
PRINTF(" %02X", s_spiSinkBuffer[j]);
}
if (failCount == 0)
{
PRINTF("\r\n Spi master transfer succeed! \r\n");
}
else
{
PRINTF("\r\n **failures detected in Spi master transfer! \r\n");
}
// Wait for press any key.
PRINTF("\r\nPress any key to run again\r\n");
GETCHAR();
loopCount++;
}
}