void EEPROM_Read(int addr,unsigned char* pdata,int len,unsigned char ischar)
{
int i=0;
volatile unsigned long tmp=0;
volatile unsigned char c1=0;
volatile unsigned char c2=0;
c1 = 0x03; // Read command
if (addr>0xFF) c1|=8; // address 9th bit
c2 = addr ;
CS_ON();
while(SSIBusy(SSI1_BASE)) {};
PUT(c1);
PUT(c2);
while( SSIDataGetNonBlocking(SSI1_BASE,(unsigned long*) &tmp)) {} ;
for(i=0;i<len;i++)
{ PUT(0x00);//// Send dummy Byte command
while(SSIDataGetNonBlocking(SSI1_BASE, (unsigned long*) &tmp))// Fetch data from RX buffer
{
DELAY();
}
if ((ischar) && (tmp==UNINITIALIZED)) tmp = ZERO;
*(pdata+i) = tmp;
}
CS_OFF();
DELAY();
}
int main(void)
{
setup();
UART_TX_string("XCVR RX:\n\r");
cc112x_manualReset(GPIO_PORTA_BASE, GPIO_PIN_6);
cc112x_write_regs(1, cc112x_regSettings, sizeof(cc112x_regSettings) / (2 * sizeof(uint16_t)));
SSIDataPut(SSI0_BASE, CC112X_SRX);
while(SSIBusy(SSI0_BASE));
_DELAY_MS(1000);
while(1)
{
SSIDataPut(SSI0_BASE, (uint8_t)((CC112X_NUM_RXBYTES & 0xFF00) >> 8));
SSIDataPut(SSI0_BASE, (uint8_t)(CC112X_NUM_RXBYTES & 0x00FF));
while(SSIBusy(SSI0_BASE));
uint32_t recieved;
while(SSIDataGetNonBlocking(SSI0_BASE, &recieved));
SSIDataPut(SSI0_BASE, CC112X_SNOP);
while(SSIBusy(SSI0_BASE));
SSIDataGet(SSI0_BASE, &recieved);
char tmp2[100];
sprintf(tmp2, "\r\nbytes in rx fifo: %i\r\n", recieved);
UART_TX_string(tmp2);
int num_bytes = recieved;
int i;
for(i = 0; i < num_bytes; i++)
{
recieved = 0;
SSIDataPut(SSI0_BASE, CC112X_SINGLE_RXFIFO);
while(SSIDataGetNonBlocking(SSI0_BASE, &recieved));
SSIDataPut(SSI0_BASE, CC112X_SNOP);
SSIDataGet(SSI0_BASE, &recieved);
char tmp[10];
sprintf(tmp, "%i\r\n", recieved);
UART_TX_string(tmp);
}
}
}
/**
* Configures the temperature sensor for continuous read mode and reads the
* status register
* Utilizes SSI0
*
* \param statusreg - A pointer to store the status information that is read
**/
void temp_configSensorContinuousRead(uint32_t *statusreg) {
uint32_t commandWriteConfigReg = 0x00000C01;
uint32_t commandReadStatusReg = 0x00000040; // 0b01000000
uint32_t commandReadStatusEmpty = 0x00000000;
uint32_t trashBin[2];
// Setup Configuration Register (register address: 0x01
SSIDataPut(SSI0_BASE, commandWriteConfigReg);
SSIDataPut(SSI0_BASE, commandReadStatusEmpty);
// SysCtlDelay(4170000); // (3 cycles/loop) * (1/50MHz) * (4170000 loop cycles) = 250.2ms
// Read any residual data from the SSI port. This makes sure the receive
// FIFOs are empty, so we don't read any unwanted junk. This is done here
// because the SPI SSI mode is full-duplex, which allows you to send and
// receive at the same time. The SSIDataGetNonBlocking function returns
// "true" when data was returned, and "false" when no data was returned.
// The "non-blocking" function checks if there is any data in the receive
// FIFO and does not "hang" if there isn't.
while(SSIDataGetNonBlocking(SSI0_BASE, &trashBin[0]))
{
}
// Read status register (Address: 0x0)
SSIDataPut(SSI0_BASE, commandReadStatusReg);
SSIDataGet(SSI0_BASE, &trashBin[1]);
SSIDataPut(SSI0_BASE, commandReadStatusEmpty);
SSIDataGet(SSI0_BASE, statusreg);
//Need to adjust for different processor frequencies
SysCtlDelay(4170000); // (3 cycles/loop) * (1/50MHz) * (4170000 loop cycles) = 250.2ms
}
/**
Initializes the Serial Peripheral Interface (SPI) interface to the Zigbee Module (ZM).
@note Maximum module SPI clock speed is 4MHz. SPI port configured for clock polarity of 0, clock
phase of 0, and MSB first.
@note The Stellaris LaunchPad uses SSI2 to communicate with module
@pre SPI pins configured correctly:
- Clock, MOSI, MISO configured as SPI function
- Chip Select configured as an output
- SRDY configured as an input.
@post SPI port is configured for communications with the module.
*/
void halSpiInitModule()
{
// Disable the SSI Port
//SSIDisable(SSI2_BASE);
// Reconfigure the SSI Port for Module operation.
// Clock polarity = inactive is LOW (CPOL=0); Clock Phase = 0; MSB first; Master Mode, 2MHz, data is 8bits wide;
SSIConfigSetExpClk(SSI2_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 1000000, 8);
// Enable the SSI Port
SSIEnable(SSI2_BASE);
//
// Read any residual data from the SSI port. This makes sure the receive
// FIFOs are empty, so we don't read any unwanted junk. This is done here
// because the SPI SSI mode is full-duplex, which allows you to send and
// receive at the same time. The SSIDataGetNonBlocking function returns
// "true" when data was returned, and "false" when no data was returned.
// The "non-blocking" function checks if there is any data in the receive
// FIFO and does not "hang" if there isn't.
//
uint32_t ulDataRx[5];
while(SSIDataGetNonBlocking(SSI2_BASE, &ulDataRx[0]))
{
}
// Don't select the module
SPI_SS_CLEAR();
}
//*****************************************************************************
//
//! Enable the SSI component of the OLED display driver.
//!
//! This function initializes the SSI interface to the OLED display.
//!
//! \return None.
//
//*****************************************************************************
void
RIT128x96x4Disable(void)
{
unsigned long ulTemp;
//
// Indicate that the RIT driver can no longer use the SSI Port.
//
HWREGBITW(&g_ulSSIFlags, FLAG_SSI_ENABLED) = 0;
//
// Drain the receive fifo.
//
while(SSIDataGetNonBlocking(SSI0_BASE, &ulTemp) != 0)
{
}
//
// Disable the SSI port.
//
SSIDisable(SSI0_BASE);
//
// Disable SSI control of the FSS pin.
//
GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_3);
GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,
GPIO_PIN_TYPE_STD_WPU);
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_PIN_3);
}
unsigned char sendCommand(unsigned char cmd, unsigned int arg) {
unsigned int buf;
// clear out any buffers
// same potential warnings as mmc.c:6
while(SSIDataGetNonBlocking(SPI_BASE, &buf));
tradeByte((cmd | 0x40));
tradeByte(arg>>24); tradeByte(arg>>16); tradeByte(arg>>8); tradeByte(arg);
// hard-coded CRC values for CMD0/8
if(cmd == CMD0)
tradeByte(0x95);
else if (cmd == CMD8)
tradeByte(0x87);
// otherwise, doesn't matter
else
tradeByte(0xff);
for(int i = 0; i < 9; i++) {
buf = tradeByte(0xff);
if(buf != 0xff)
break;
else continue;
}
while(tradeByte(0xff) != 0xff); // throw away any CRC or trailing bits
return buf;
}
// --------------------------------------------------------------------------------------
//
// SB_ServoSet
//
// --------------------------------------------------------------------------------------
void SB_ZeroToTenOutput (ui8 slaveMask, ui8 *outputLevels )
{
ui32 tempLong = 0;
// CS the Slave
SB_CS_Select( slaveMask );
SSIDataPutNonBlocking(SSI0_BASE, (ui16)('#'<<8 | SB_ZEROTEN_UPDATE));
// Pack the update
SSIDataPutNonBlocking(SSI0_BASE, (ui16)(outputLevels[0]<<8 | outputLevels[1]));
SSIDataPutNonBlocking(SSI0_BASE, (ui16)(outputLevels[2]<<8 | outputLevels[3]));
SSIDataPutNonBlocking(SSI0_BASE, (ui16)(outputLevels[4]<<8 | outputLevels[5]));
SSIDataPutNonBlocking(SSI0_BASE, (ui16)(outputLevels[6]<<8 | 0x00));
// Make sure it's all sent
while ( SSIBusy(SSI0_BASE) )
{
// TODO : Time out
}
// Clear data read in
while(SSIDataGetNonBlocking(SSI0_BASE, &tempLong))
{
}
// Deselect the Slave
SB_CS_DeSelect( slaveMask );
}
void EEPROM_Write(int addr,unsigned char* pdata,int len)
{
int i;
unsigned long tmp;
volatile unsigned char c1;
volatile unsigned char c2;
volatile unsigned char c3;
volatile unsigned char* pd = pdata;
c1 = 0x02; // Write command
if (addr>0xFF) c1|=8; // address 9th bit
c2 = addr;
CS_ON();
PUT(0x06);//// Send WREN (Enable Write Operations)
CS_OFF();
CS_ON();
while( SSIDataGetNonBlocking(SSI1_BASE, &tmp)) {} ;
while(SSIBusy(SSI1_BASE)) {};
PUT(c1);
PUT(c2);
for(i=0;i<len;i++)
{ c3 = *(pd+i);
PUT(c3);
}
CS_OFF();
DELAY();
}
/* Write one character to SPI - will not wait for end useful for multiple writes with wait after final */
void
spi_write_fast(unsigned char txData)
{
uint32_t ui32sendData=0x00000000;
uint32_t ui32dummyData;
ui32sendData += txData;
//
// Wait until SSI0 is done transferring all the data in the transmit FIFO.
//
while(SSIBusy(SSI_BASE))
{
}
//
// Send the data using the "blocking" put function. This function
// will wait until there is room in the send FIFO before returning.
// This allows you to assure that all the data you send makes it into
// the send FIFO.
//
SSIDataPut(SSI_BASE, ui32sendData);
//
// Read any residual data from the SSI port. This makes sure the receive
// FIFOs are empty, so we don't read any unwanted junk. This is done here
// because the SPI SSI mode is full-duplex, which allows you to send and
// receive at the same time. The SSIDataGetNonBlocking function returns
// "true" when data was returned, and "false" when no data was returned.
// The "non-blocking" function checks if there is any data in the receive
// FIFO and does not "hang" if there isn't.
//
while(SSIDataGetNonBlocking(SSI_BASE, &ui32dummyData))
{
}
}
static uint8_t spiWriteReadByte(uint8_t val)
{
uint32_t retVal = 0x00; // ivalid value
SSIDataPut(SSI0_BASE, val);
while (SSIBusy(SSI0_BASE))
{}
while (SSIDataGetNonBlocking(SSI0_BASE, &retVal));
return (uint8_t)retVal;
}
void vs_ssi_wait(void)
{
unsigned long r;
while(HWREG(SSI1_BASE + SSI_O_SR) & SSI_SR_BSY); //busy?
//while(!(HWREG(SSI0_BASE + SSI_O_SR) & SSI_SR_TFE)); //transmit fifo empty?
while(SSIDataGetNonBlocking(SSI1_BASE, &r)); //clear receive fifo
return;
}
//--------------------------------
void ssi_peripheral::UnloadRxFIFO() {
int32_t nResult = 1;
m_nRxCount = 0;
for (int nIndex = 0; nResult && (BufferSize > nIndex); nIndex++) {
nResult = SSIDataGetNonBlocking(m_rSpecification.m_nSSIBase,
&m_nDataRx[nIndex]);
m_nRxCount += nResult;
}
if (m_nRxCount) {
OnRx();
}
}
//*****************************************************************************
//
// The spi1 slaver interrupt handler.
//
//*****************************************************************************
void SPI_spi0_int_handler(void)
{
unsigned long status;
unsigned long buf;
status = SSIIntStatus(SSI0_BASE, true); // »ñÈ¡ÖжÏ״̬
#if 0 // for test
if (status)
{
SSIIntClear(SSI0_BASE, status);
UARTSend((unsigned char *)"\r\nSSI0", 6);
return;
}
#else
if (!status)
{
return;
}
SSIIntClear(SSI0_BASE, status);
switch (status)
{
case SSI_RXFF:
case SSI_RXOR:
while (1)
{
if (SSIDataGetNonBlocking(SSI0_BASE, &buf))
{
spi_rx_buf[spi_rx_idx++] = (unsigned char)buf;
UARTSend(&spi_rx_buf[spi_rx_idx-1], 1); // test
}
else
{
spi_rx_len = spi_rx_idx;
spi_rx_idx = 0;
//OSSemPost();
UARTSend("\r\n", 2); // test
break;
}
}
break;
case SSI_RXTO:
// do something for timeout
break;
default:
break;
}
#endif
}
// --------------------------------------------------------------------------------------
//
// SB_DmxUpdate
//
// --------------------------------------------------------------------------------------
void SB_DmxUpdate(ui8 slaveMask, ui16 offset, ui16 channelCnt, ui8 *updatedVal)
{
ui32 tempLong = 0;
ui16 i = 0;
// TODO : Buffer check, channelCnt Limit
// TODO : offset check with channel cant exceed 512
// CS the Slave
SB_CS_Select( slaveMask );
SSIDataPut(SSI0_BASE, (ui16)('#'<<8 | SB_DMX_UPDATE));
SSIDataPut(SSI0_BASE, offset);
SSIDataPut(SSI0_BASE, channelCnt);
// pack 2 bytes into each 16bit value
// accounting for an odd number to send
for (i=0; i<(channelCnt/2); i++)
{
tempLong = updatedVal[i*2];
//tempLong <<= 8;
if ( (i*2)+1 >= channelCnt)
{
// clear the bottom byte out
tempLong &= ~0xFF00;
}
else
{
tempLong |= (updatedVal[(i*2)+1] << 8) & 0xFF00;
}
SSIDataPut(SSI0_BASE, tempLong);
}
// Make sure it's all sent
while ( SSIBusy(SSI0_BASE) )
{
// TODO : Time out
}
// Clear data read in
while(SSIDataGetNonBlocking(SSI0_BASE, &tempLong))
{
}
// Deselect the Slave
SB_CS_DeSelect( slaveMask );
}
/**
* Resets the SPI bus to clear any partial instructions, etc.
* Utilizes SSI0
**/
void temp_resetSPI(void) {
uint32_t commandReset = 0x0000FFFF;
uint32_t trashBin[1];
// Reset by 32 cycles of 1 on Din
SSIDataPut(SSI0_BASE, commandReset);
SSIDataPut(SSI0_BASE, commandReset);
// Empty Rx FIFO
while(SSIDataGetNonBlocking(SSI0_BASE, &trashBin[0])) {
}
// Delay for the required 500us
SysCtlDelay(8334); // (3 cycles/loop) * (1/50MHz) * (4170000 loop cycles) = 600us (500us needed after reset)
}
/**************************************************************************************************
* @fn npSpiUdmaPrepareRx
*
* @brief This function is called to set up uDMA for SPI RX. The uDMA and SPI must be
* initialized once already.
*
* input parameters
*
* None.
*
* output parameters
*
* None.
*
* @return None.
**************************************************************************************************
*/
static void npSpiUdmaPrepareRx(void)
{
uint32 ulDummy;
/* Flush the RX FIFO */
while(SSIDataGetNonBlocking(BSP_SPI_SSI_BASE, &ulDummy));
/* Prepare for the next one byte RX DMA */
uDMAChannelTransferSet(UDMA_CH10_SSI0RX | UDMA_PRI_SELECT,
UDMA_MODE_BASIC, SPI_DATA, npSpiBuf, 1);
uDMAChannelEnable(UDMA_CH10_SSI0RX);
/* Disable the TX channel in RX */
SSIDMADisable(BSP_SPI_SSI_BASE, SSI_DMA_TX);
SSIDMAEnable(BSP_SPI_SSI_BASE, SSI_DMA_RX);
}
int spi_Read(Fd_t fd, unsigned char *pBuff, int len)
{
int i = 0;
unsigned long ulBuff;
ASSERT_CS();
for(i=0; i< len; i++)
{
while(SSIDataPutNonBlocking(SPI_BASE, 0xFF) != TRUE);
while(SSIDataGetNonBlocking(SPI_BASE, &ulBuff) != TRUE);
pBuff[i] = (unsigned char)ulBuff;
}
DEASSERT_CS();
return len;
}
void SPIController::configure(protocol_t protocol, mode_t mode, uint32_t bitrate, data_width_t data_width)
{
_data_width = data_width;
SSIConfigSetExpClk(_base, ROM_SysCtlClockGet(), protocol, mode, bitrate, data_width);
SSIEnable(_base);
// empty receive fifos
uint32_t dummy_read;
while(SSIDataGetNonBlocking(_base, &dummy_read)) {}
_read_mask = 0;
for (uint8_t i=0; i<data_width; i++) {
_read_mask |= (1<<i);
}
}
/* Flush the SPI read register */
void
spi_flush(void)
{
uint32_t ui32rxDummyData;
//
// Read any residual data from the SSI port. This makes sure the receive
// FIFOs are empty, so we don't read any unwanted junk. This is done here
// because the SPI SSI mode is full-duplex, which allows you to send and
// receive at the same time. The SSIDataGetNonBlocking function returns
// "true" when data was returned, and "false" when no data was returned.
// The "non-blocking" function checks if there is any data in the receive
// FIFO and does not "hang" if there isn't.
//
while(SSIDataGetNonBlocking(SSI_BASE, &ui32rxDummyData))
{
}
}
int spi_Write(Fd_t fd, unsigned char *pBuff, int len)
{
int len_to_return = len;
unsigned long ulDummy;
ASSERT_CS();
while(len)
{
while(SSIDataPutNonBlocking(SPI_BASE, (unsigned long)*pBuff) != TRUE);
while(SSIDataGetNonBlocking(SPI_BASE, &ulDummy) != TRUE);
pBuff++;
len--;
}
DEASSERT_CS();
return len_to_return;
}
/* Read one character from SPI */
void
spi_read(unsigned char *rxData)
{
uint32_t ui32sendData=0x00000000;
uint32_t ui32dummyData;
// Wait until SSI0 is done transferring all the data in the transmit FIFO.
//
while(SSIBusy(SSI_BASE))
{
}
//
// Send the data using the "blocking" put function. This function
// will wait until there is room in the send FIFO before returning.
// This allows you to assure that all the data you send makes it into
// the send FIFO.
//
SSIDataPut(SSI_BASE, ui32sendData);
while(!((HWREG(SSI_BASE + SSI_O_SR) & SSI_SR_TFE) && ((HWREG(SSI_BASE + SSI_O_SR) & SSI_SR_RNE))));
//
// Wait until SSI0 is done transferring all the data in the transmit FIFO.
// Wait for TX ready
while(SSIBusy(SSI_BASE))
{
}
//
// Receive the data using the "blocking" Get function. This function
// will wait until there is data in the receive FIFO before returning.
//
SSIDataGet(SSI_BASE, &ui32sendData);//Need to check with Jonas??????????
while(SSIBusy(SSI_BASE))
{
}
while(SSIDataGetNonBlocking(SSI_BASE, &ui32dummyData))
{
}
// Since we are using 8-bit data, mask off the MSB.
//
ui32sendData &= 0x00FF;
// transfer to unsigned char
*rxData = (unsigned char)ui32sendData;
//printf("spi_read: %d\n",*rxData);
}
// --------------------------------------------------------------------------------------
// SB_ServoSet
// Set 12 Servo positions
// --------------------------------------------------------------------------------------
void SB_ServoSet (ui8 slaveMask, ui8 *positions, ui8 servoOffset, ui8 servoCnt )
{
ui32 tempLong = 0;
ui16 *tempShort ;
// TODO : Finish this function
// CS the Slave
SB_CS_Select( slaveMask );
SSIDataPutNonBlocking(SSI0_BASE, (ui16)('#'<<8 | SB_SERVO_MOVE));
SSIDataPutNonBlocking(SSI0_BASE, (ui16)(servoOffset<<8 | servoCnt));
tempShort = (ui16 *)positions;
/*
for (i=0; i<servoCnt; i++)
{
SSIDataPut(SSI0_BASE, tempShort[i]);
}
*/
SSIDataPutNonBlocking(SSI0_BASE, tempShort[0]);
SSIDataPutNonBlocking(SSI0_BASE, tempShort[1]);
SSIDataPutNonBlocking(SSI0_BASE, tempShort[2]);
SSIDataPutNonBlocking(SSI0_BASE, tempShort[3]);
SSIDataPutNonBlocking(SSI0_BASE, tempShort[4]);
SSIDataPut(SSI0_BASE, tempShort[5]);
// Make sure it's all sent
while ( SSIBusy(SSI0_BASE) )
{
// TODO : Time out
}
// Clear data read in
while(SSIDataGetNonBlocking(SSI0_BASE, &tempLong))
{
}
// De-select the Slave
SB_CS_DeSelect( slaveMask );
}
//*****************************************************************************
//
//! Enable the SSI component of the OLED display driver.
//!
//! \param ulFrequency specifies the SSI Clock Frequency to be used.
//!
//! This function initializes the SSI interface to the OLED display.
//!
//! \return None.
//
//*****************************************************************************
void
RIT128x96x4Enable(unsigned long ulFrequency)
{
unsigned long ulTemp;
//
// Disable the SSI port.
//
SSIDisable(SSI0_BASE);
//
// Configure the SSI0 port for master mode.
//
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_2,
SSI_MODE_MASTER, ulFrequency, 8);
//
// (Re)Enable SSI control of the FSS pin.
//
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_3);
GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_8MA,
GPIO_PIN_TYPE_STD_WPU);
//
// Enable the SSI port.
//
SSIEnable(SSI0_BASE);
//
// Drain the receive fifo.
//
while(SSIDataGetNonBlocking(SSI0_BASE, &ulTemp) != 0)
{
}
//
// Indicate that the RIT driver can use the SSI Port.
//
g_bSSIEnabled = true;
}
// --------------------------------------------------------------------------------------
//
// SB_Init
//
// --------------------------------------------------------------------------------------
void SB_Init ( void )
{
ui32 tempLong = 0;
// Configure the SPI,
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
// Enable SPI 0
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
SSIEnable(SSI0_BASE);
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_2);
// Increase pull up strength to 4mA
//GPIOPadConfigSet(GPIO_PORTA_BASE, (GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_2), GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD_WPU);
// Set CS lines as outputs
GPIOPinTypeGPIOOutput(SB_SPI_CS_PORT, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4);
// Deselect them all!
SB_CS_DeSelect( 0xFF );
// Rising Edge, 5mhz, 16bits per
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, 5000000, 16);
SSIEnable(SSI0_BASE);
// SPI Lines
UserGpio_AppSetMask(USER_GPIO_PORTA, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_2);
// CS Lines
UserGpio_AppSetMask(USER_GPIO_PORTE, GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4);
// Empty the fifo incase there is any unprocessed received data, we don't want/need it
while(SSIDataGetNonBlocking(SSI0_BASE, &tempLong))
{
// TODO : Time out
}
}
/**************************************************************************************************
* @fn bootloaderCommunicationRequested
*
* @brief Function to check if boot loader should run
*
* input parameters
*
* None.
*
* output parameters
*
* None.
*
* @return None.
**************************************************************************************************
*/
bool bootloaderCommunicationRequested(void)
{
/* about 15 seconds @ 32MHz clock */
uint32 delay = BOOT_DELAY;
uint8 ch;
/* Set SRDY low to let master know that Slave is ready to recieve bytes */
GPIOPinWrite(HAL_SPI_SRDY_BASE, HAL_SPI_SRDY_PIN, 0);
/* post decrement for delay, because for SB_FORCE_RUN condition delay is set
* to zero to terminate the while loop. If pre decrement for delay with --delay
* the SB_FORCE_RUN will NOT terminate the loop.
*/
while (delay--)
{
/* Read byte */
if(SSIDataGetNonBlocking(SSI0_BASE, (uint32_t *)&ch) == 1)
{
/* Bootloader should download code. */
if (ch == SB_FORCE_BOOT)
{
/* Set SRDY high */
GPIOPinWrite(HAL_SPI_SRDY_BASE, HAL_SPI_SRDY_PIN, HAL_SPI_SRDY_PIN);
return TRUE;
}
else if (ch == SB_FORCE_RUN)
{
delay = 0;
}
}
}
/* Set SRDY high */
GPIOPinWrite(HAL_SPI_SRDY_BASE, HAL_SPI_SRDY_PIN, HAL_SPI_SRDY_PIN);
/* Skip image download, jump to existing application image */
return FALSE;
}
uint16_t AnalogADDAControlInit( void)
{
//temporary var
//volatile uint32_t delay;
//uint32_t temp,data,data1;
uint32_t temp;
//! konfigurace GPIO
// LED GPIO
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOB);
GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_2);
GPIOPinTypeGPIOOutput(GPIO_PORTB_BASE, GPIO_PIN_3);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOD);
GPIOPinTypeGPIOOutput(GPIO_PORTD_BASE, GPIO_PIN_6);
// RESET GPIO
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_3);
// Crystal GPIO
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
GPIOPinTypeGPIOOutput(GPIO_PORTC_BASE, GPIO_PIN_6);
GPIOPinTypeGPIOOutput(GPIO_PORTC_BASE, GPIO_PIN_7);
GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, 0);
GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_6, 0);
// SSI GPIO
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_4);
GPIOPinTypeGPIOOutput(GPIO_PORTA_BASE, GPIO_PIN_6);
// SSI alt function
// The SSI peripheral must be enabled for use.
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
//GPIOPinConfigure(GPIO_PA4_SSI0RX);
GPIOPinConfigure(GPIO_PA5_SSI0TX);
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_2);
//GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_4);
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5);
// SSi sel
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_4, 0);
GPIOPinWrite(GPIO_PORTA_BASE, GPIO_PIN_6, GPIO_PIN_6);
// reset disable
GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_3, GPIO_PIN_3);
// TODO: delay po resetu
// crystal enable
GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);
AudioADDACsamplerate = 48000;
#ifdef ADDA_ONLY_ONE_XTAL
#warning "Only for One crystal oscilator configuration - special situation!"
GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_6, GPIO_PIN_6);
GPIOPinWrite(GPIO_PORTC_BASE, GPIO_PIN_7, GPIO_PIN_7);
#endif
//! SSI configuration
uint32_t clock = SysCtlClockGet();
uint32_t SSIclk = 100000;
// Clock configuration
SSIConfigSetExpClk(SSI0_BASE, clock, SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, SSIclk, 16);
// Enable the each SSI module.
SSIEnable(SSI0_BASE);
// flushing receive FIFO
while(SSIDataGetNonBlocking(SSI0_BASE, &temp)){};
//! ADC configuration ----------------
/* AD1871_2_mux_mck = 0x2000;
// ADC MCLK divider & input configuration
#ifdef AD1871_ADCBUFFER_POPULATED
// external ADC buffer
AD1871_2_mux_mck |= (1<<3)|(1<<1);
#else
// internal ADC single ended buffer
AD1871_2_mux_mck |= (1<<5)|(1<<4);
#endif
// default sample rate clock/2
AD1871_2_mux_mck |= (1<<6);
AnalogADDASPItransfer(GPIO_PIN_3, AD1871_2_mux_mck);
AD1871_0_gain_hp_amc = 0;
// High pass filter
#ifdef AD1871_HPF
AD1871_0_gain_hp_amc |= (1<<8);
#endif
AnalogADDASPItransfer(GPIO_PIN_3, AD1871_0_gain_hp_amc);
AD1871_1_mute_fmt = 0x1000;
// ADC desired format 24 bit LJ format 64fs
AD1871_1_mute_fmt |= 0x60;
AnalogADDASPItransfer(GPIO_PIN_3,AD1871_1_mute_fmt);*/
//! DAC configuration ---------------
AD185x_conf = 0x01;
// DAC default format - format, filter desired format 24 bit LJ
AD185x_conf |= (1<<5);
AnalogADDASPItransfer(GPIO_PIN_6,AD185x_conf);
/*uart_str("AD1871: ");
uart_short_hex(AD1871_0_gain_hp_amc); uart_str(" ");
uart_short_hex(AD1871_1_mute_fmt); uart_str(" ");
uart_short_hex(AD1871_2_mux_mck);
uart_str("\r\n");*/
return (0);
}
//SSI0清空FIFO缓存
void SSI0_FlushFIFO(void)
{
uint32_t dataTmp=0;
while(SSIDataGetNonBlocking(SSI0_BASE, &dataTmp));
}
//*****************************************************************************
//
// Configure SSI0 in master Freescale (SPI) mode. This example will send out
// 3 bytes of data, then wait for 3 bytes of data to come in. This will all be
// done using the polling method.
//
//*****************************************************************************
int
main(void)
{
unsigned long ulDataTx[NUM_SSI_DATA];
unsigned long ulDataRx[NUM_SSI_DATA];
unsigned long ulindex;
//
// Set the clocking to run directly from the external crystal/oscillator.
// TODO: The SYSCTL_XTAL_ value must be changed to match the value of the
// crystal on your board.
//
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_16MHZ);
//
// Set up the serial console to use for displaying messages. This is
// just for this example program and is not needed for SSI operation.
//
InitConsole();
//
// Display the setup on the console.
//
UARTprintf("SSI ->\n");
UARTprintf(" Mode: SPI\n");
UARTprintf(" Data: 8-bit\n\n");
//
// The SSI0 peripheral must be enabled for use.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
//
// For this example SSI0 is used with PortA[5:2]. The actual port and pins
// used may be different on your part, consult the data sheet for more
// information. GPIO port A needs to be enabled so these pins can be used.
// TODO: change this to whichever GPIO port you are using.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
//
// Configure the pin muxing for SSI0 functions on port A2, A3, A4, and A5.
// This step is not necessary if your part does not support pin muxing.
// TODO: change this to select the port/pin you are using.
//
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA3_SSI0FSS);
GPIOPinConfigure(GPIO_PA4_SSI0RX);
GPIOPinConfigure(GPIO_PA5_SSI0TX);
//
// Configure the GPIO settings for the SSI pins. This function also gives
// control of these pins to the SSI hardware. Consult the data sheet to
// see which functions are allocated per pin.
// The pins are assigned as follows:
// PA5 - SSI0Tx
// PA4 - SSI0Rx
// PA3 - SSI0Fss
// PA2 - SSI0CLK
// TODO: change this to select the port/pin you are using.
//
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_3 |
GPIO_PIN_2);
//
// Configure and enable the SSI port for SPI master mode. Use SSI0,
// system clock supply, idle clock level low and active low clock in
// freescale SPI mode, master mode, 1MHz SSI frequency, and 8-bit data.
// For SPI mode, you can set the polarity of the SSI clock when the SSI
// unit is idle. You can also configure what clock edge you want to
// capture data on. Please reference the datasheet for more information on
// the different SPI modes.
//
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, 1000000, 8);
//
// Enable the SSI0 module.
//
SSIEnable(SSI0_BASE);
//
// Read any residual data from the SSI port. This makes sure the receive
// FIFOs are empty, so we don't read any unwanted junk. This is done here
// because the SPI SSI mode is full-duplex, which allows you to send and
// receive at the same time. The SSIDataGetNonBlocking function returns
// "true" when data was returned, and "false" when no data was returned.
// The "non-blocking" function checks if there is any data in the receive
// FIFO and does not "hang" if there isn't.
//
while(SSIDataGetNonBlocking(SSI0_BASE, &ulDataRx[0]))
{
}
//
// Initialize the data to send.
//
ulDataTx[0] = 's';
ulDataTx[1] = 'p';
ulDataTx[2] = 'i';
//
// Display indication that the SSI is transmitting data.
//
UARTprintf("Sent:\n ");
//
// Send 3 bytes of data.
//
for(ulindex = 0; ulindex < NUM_SSI_DATA; ulindex++)
{
//
// Display the data that SSI is transferring.
//
UARTprintf("'%c' ", ulDataTx[ulindex]);
//
// Send the data using the "blocking" put function. This function
// will wait until there is room in the send FIFO before returning.
// This allows you to assure that all the data you send makes it into
// the send FIFO.
//
SSIDataPut(SSI0_BASE, ulDataTx[ulindex]);
}
//
// Wait until SSI0 is done transferring all the data in the transmit FIFO.
//
while(SSIBusy(SSI0_BASE))
{
}
//
// Display indication that the SSI is receiving data.
//
UARTprintf("\nReceived:\n ");
//
// Receive 3 bytes of data.
//
for(ulindex = 0; ulindex < NUM_SSI_DATA; ulindex++)
{
//
// Receive the data using the "blocking" Get function. This function
// will wait until there is data in the receive FIFO before returning.
//
SSIDataGet(SSI0_BASE, &ulDataRx[ulindex]);
//
// Since we are using 8-bit data, mask off the MSB.
//
ulDataRx[ulindex] &= 0x00FF;
//
// Display the data that SSI0 received.
//
UARTprintf("'%c' ", ulDataRx[ulindex]);
}
//
// Return no errors
//
return(0);
}
//*****************************************************************************
//
// This example demonstrates how to send a string of data to the UART.
//
//*****************************************************************************
int
main(void)
{
//
// Set the clocking to run directly from the crystal.
//
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_8MHZ);
//
// Initialize the OLED display and write status.
//
//
// Enable the peripherals used by this example.
//
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
//PC5,PC7 EN,CSN
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC);
GPIOPinTypeGPIOOutput(GPIO_PORTC_BASE,1<<5|1<<7);
//SPI配置
unsigned long ulDataTx[NUM_SSI_DATA];
unsigned long ulDataRx[NUM_SSI_DATA];
unsigned long ulindex;
unsigned long ultemp=0;
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
//SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
GPIOPinConfigure(GPIO_PA3_SSI0FSS);
GPIOPinConfigure(GPIO_PA4_SSI0RX);
GPIOPinConfigure(GPIO_PA5_SSI0TX);
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | GPIO_PIN_3 |
GPIO_PIN_2);
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_0,
SSI_MODE_MASTER, 4000000, 8);
/*
GPIODirModeSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_DIR_MODE_OUT);
GPIOPadConfigSet(GPIO_PORTA_BASE, GPIO_PIN_3, GPIO_STRENGTH_4MA,
GPIO_PIN_TYPE_STD_WPU);
GPIODirModeSet(GPIO_PORTB_BASE, GPIO_PIN_0, GPIO_DIR_MODE_OUT);
GPIOPadConfigSet(GPIO_PORTB_BASE, GPIO_PIN_0 , GPIO_STRENGTH_4MA,
GPIO_PIN_TYPE_STD_WPU);
*/
SSIEnable(SSI0_BASE);
//
// Enable processor interrupts.
//
IntMasterEnable();
//
// Set GPIO A0 and A1 as UART pins.
//
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
//
// Configure the UART for 115,200, 8-N-1 operation.
//
UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
//
// Enable the UART interrupt.
//
IntEnable(INT_UART0);
UARTIntEnable(UART0_BASE, UART_INT_RX | UART_INT_RT);
//
// Prompt for text to be entered.
//
UARTStdioInit(0);
UARTSend((unsigned char *)"Enter text:\n\r", 12);
UARTSend((unsigned char *)"Enter text:\n\r", 12);
//清零接收缓冲区
while(SSIDataGetNonBlocking(SSI0_BASE, &ulDataRx[0]))
{
}
ulDataTx[0] = 's';
ulDataTx[1] = 'p';
ulDataTx[2] = 'i';
set_nrf24l01_csn_l();
/*
for(ulindex = 0; ulindex < NUM_SSI_DATA; ulindex++)
{
UARTprintf("'%c' ", ulDataTx[ulindex]);
SSIDataPut(SSI0_BASE, ulDataTx[ulindex]);
}
*/
set_nrf24l01_csn_h();
_delay_ms(1);
if( setDataRate( RF24_250KBPS ) )
{
p_variant = true ;
}
//初始化NRF24L01
set_module_tx();
nrf_write_reg(NRF_CONFIG,0x0a);
print_byte_register("CONFIG\t",NRF_CONFIG,1);
init_NRF24L01();
set_module_tx();
unsigned char transfer_value[]="EEWORLD_MSP430_00";
//set_module_tx();
//读不出来spi数据的原因是,原来里面有没读取完的数据,需要先清理,再读写.
setChannel(74);
UARTprintf("getchannel:%d\r\n",getChannel());
// setChannel(24);
// UARTprintf("getchannel:%d\r\n",getChannel());
//写地址
nrf_write_buf(TX_ADDR,(uint8_t*)&addresses[0],5);
uint8_t recvbuf[5];
nrf_read_buf(TX_ADDR,&recvbuf[0],5);
for(int i=0;i<5;i++)
{
UARTprintf("%d:%d ",i,recvbuf[i]);
}
UARTprintf("\r\n");
//end of test write address
uint8_t data[32];
for(int i=0;i<32;i++)
{
data[i]=i;
}
UARTprintf("\r\n");
//while(SSIDataGetNonBlocking(SSI0_BASE, &ulDataRx[0]))
//{
//}
//重新发送前,避免写缓冲区满
flush_tx();
spi_write_reg(STATUS, ( spi_read_reg(STATUS) ) | _BV(MAX_RT) );
//role=role_ping_out
openWritingPipe(addresses[0]);
openReadingPipe(1,addresses[1]);
nrf_write_buf(RX_ADDR_P0,(uint8_t*)&addresses[0],5);
unsigned char test;
//while(1)
{
test=spi_read_reg(0x05);
UARTprintf("test:%d\r\n",test);
_delay_ms(1000);
}
//调试关闭
//nrf_write_reg(EN_AA,0x00);
nrf_write_reg(EN_RXADDR,0x02);
//nrf_write_reg(SETUP_RETR,0x00);
nrf_write_reg(RX_PW_P1,0x20);
//set_module_tx();
nrf_write_reg(NRF_CONFIG,0x0b);
nrf_write_reg(CONFIG, nrf_read_reg(CONFIG) | _BV(PRIM_RX));
nrf_write_reg(STATUS, _BV(RX_DR) | _BV(TX_DS) | _BV(MAX_RT) );
set_nrf24l01_ce_h();
nrf_write_buf(RX_ADDR_P0,(uint8_t*)&addresses[0],5);
set_nrf24l01_ce_h();
if(nrf_read_reg(FEATURE) & _BV(EN_ACK_PAY))
{
flush_tx();
}
flush_rx();
print_status(get_status());
nrf_write_reg(SETUP_AW,0x03);
print_byte_register("SETUP_AW\t",SETUP_AW,1);
print_address_register("RX_ADDR_P0-1",RX_ADDR_P0,2);
print_byte_register("RX_ADDR_P2-5",RX_ADDR_P2,4);
print_address_register("TX_ADDR\t",TX_ADDR,1);
print_byte_register("RX_PW_P0-6",RX_PW_P0,6);
print_byte_register("EN_AA\t",EN_AA,1);
print_byte_register("EN_RXADDR",EN_RXADDR,1);
print_byte_register("RF_CH\t",RF_CH,1);
print_byte_register("RF_SETUP",RF_SETUP,1);
print_byte_register("CONFIG\t",NRF_CONFIG,1);
print_byte_register("DYNPD/FEATURE",DYNPD,2);
UARTprintf("Data Rate\t = %s\r\n", pgm_read_word(&rf24_datarate_e_str_P[getDataRate()]));
UARTprintf("Model\t\t = %s\r\n", pgm_read_word(&rf24_model_e_str_P[isPVariant()]));
UARTprintf("CRC Length\t = %s\r\n",pgm_read_word(&rf24_crclength_e_str_P[getCRCLength()]));
UARTprintf("PA Power\t = %s\r\n", pgm_read_word(&rf24_pa_dbm_e_str_P[getPALevel()]));
Init_Timer_A();
set_nrf24l01_ce_h();
//将业务数据写入:WR_TX_PLOAD
uint8_t fifo_status,status,state,i;
while(1)
{
fifo_status=spi_read_reg(FIFO_STATUS);
if(fifo_status&0x02)
{
status=spi_read_reg(STATUS);
if(status&_BV(RX_DR))
{
state=spi_send_byte(RD_RX_PLOAD);
for(i=0;i<RX_PLOAD_WIDTH;i++)
{
status=spi_send_byte(0xff);
//buf[i]=status;
}
nrf_write_reg(FLUSH_RX,0xFF);
//UARTprintf(".");
counter++;
}
if(status &0x02)
{
nrf_write_reg(FLUSH_RX,0xFF);
//UARTprintf(".");
counter++;
}
nrf_rx_packet(data);
}
}
while(available(0))
{
//UARTprintf(".");
if(nrf_rx_packet(data) == 0)
{
counter++;
}
//UARTprintf(".");
//_delay_ms(50);
/*
set_nrf24l01_ce_l();
nrf_write_buf(WR_TX_PLOAD,data,TX_PLOAD_WIDTH);
set_nrf24l01_ce_h();
_delay_ms(30);
*/
}
}
void spi_ad7705Init(void)
{
uint32 ulDataRx;
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
//
// Configure the pin muxing for SSI0 functions on port A2, A3, A4, and A5.
// This step is not necessary if your part does not support pin muxing.
// TODO: change this to select the port/pin you are using.
//
GPIOPinConfigure(GPIO_PA2_SSI0CLK);
// GPIOPinConfigure(GPIO_PA3_SSI0FSS);
GPIOPinConfigure(GPIO_PA4_SSI0RX);
GPIOPinConfigure(GPIO_PA5_SSI0TX);
//
// Configure the GPIO settings for the SSI pins. This function also gives
// control of these pins to the SSI hardware. Consult the data sheet to
// see which functions are allocated per pin.
// The pins are assigned as follows:
// PA5 - SSI0Tx
// PA4 - SSI0Rx
// PA3 - SSI0Fss
// PA2 - SSI0CLK
// TODO: change this to select the port/pin you are using.
//
GPIOPinTypeSSI(GPIO_PORTA_BASE, GPIO_PIN_5 | GPIO_PIN_4 | //| GPIO_PIN_3
GPIO_PIN_2);
//
// Configure and enable the SSI port for SPI master mode. Use SSI0,
// system clock supply, idle clock level low and active low clock in
// freescale SPI mode, master mode, 1MHz SSI frequency, and 8-bit data.
// For SPI mode, you can set the polarity of the SSI clock when the SSI
// unit is idle. You can also configure what clock edge you want to
// capture data on. Please reference the datasheet for more information on
// the different SPI modes.
//
SSIConfigSetExpClk(SSI0_BASE, SysCtlClockGet(), SSI_FRF_MOTO_MODE_3,
SSI_MODE_MASTER, 1000000, 8);
//
// Enable the SSI0 module.
//
SSIEnable(SSI0_BASE);
//
// Read any residual data from the SSI port. This makes sure the receive
// FIFOs are empty, so we don't read any unwanted junk. This is done here
// because the SPI SSI mode is full-duplex, which allows you to send and
// receive at the same time. The SSIDataGetNonBlocking function returns
// "true" when data was returned, and "false" when no data was returned.
// The "non-blocking" function checks if there is any data in the receive
// FIFO and does not "hang" if there isn't.
//
while(SSIDataGetNonBlocking(SSI0_BASE, &ulDataRx)) ;
}
