/*********************************************************************//**
* @brief Read Page value at desired address(0x000 to 0x7FF)
* @param[in] SSPx SSP peripheral definition, should be:
* - LPC_SSP0: SSP0 peripheral
* - LPC_SSP1: SSP1 peripheral
* @param[in] eep_address EEPROM 16bit address
* @param[in] *dest_addr buffer address
* @param[in] length size of buffer
* @return read status
**********************************************************************/
uchar Ssp_Eeprom_Read (LPC_SSP_TypeDef *SSPx, uint16_t eep_address, uint8_t *dest_addr, uint8_t length)
{
SSP_DATA_SETUP_Type xferConfig;
uchar ReadStatus =0;
Tx_Buf1[0] = EEP_READ; // READ IR 8bit msb
Tx_Buf1[1] = (uchar)(eep_address>>8); // 1st byte extract
Tx_Buf1[2] = (uchar)eep_address; // 2nd byte extract
CS_Force1 (SSPx, DISABLE);
xferConfig.tx_data = Tx_Buf1; /* Send Instruction Byte */
xferConfig.rx_data = Rx_Buf1; /* Store byte in Rx_Buf[0] */
xferConfig.length = 3;
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
xferConfig.tx_data = NULL;
xferConfig.rx_data = dest_addr; /* Store byte */
xferConfig.length = length;
ReadStatus = SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
if(ReadStatus)
{
CS_Force1 (SSPx, ENABLE);
delay_ms(4);
return(1); // Return value
}
else
return(0);
}
/*********************************************************************//**
* @brief Read Byte value at desired address(0x000 to 0x7FF)
* @param[in] SSPx SSP peripheral definition, should be:
* - LPC_SSP0: SSP0 peripheral
* - LPC_SSP1: SSP1 peripheral
* @param[in] eep_address EEPROM 16bit address
* @return Read Byte is returned
**********************************************************************/
uint8_t Ssp_Eeprom_Read_Byte (LPC_SSP_TypeDef *SSPx, uint16 eep_address)
{
SSP_DATA_SETUP_Type xferConfig;
Tx_Buf1[0] = EEP_READ; /* READ IR 8bit msb */
Tx_Buf1[1] = (uchar)(eep_address>>8); // 1st byte extract
Tx_Buf1[2] = (uchar)eep_address; // 2nd byte extract
CS_Force1 (SSPx, DISABLE);
xferConfig.tx_data = Tx_Buf1; /* Send Instruction Byte */
xferConfig.rx_data = Rx_Buf1; /* Store byte in Rx_Buf[0] */
xferConfig.length = 3;
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
xferConfig.tx_data = NULL;
xferConfig.rx_data = Rx_Buf1; /* Store byte in Rx_Buf[0] */
xferConfig.length = 1;
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
if(Rx_Buf1[0])
{
CS_Force1 (SSPx, ENABLE);
return(Rx_Buf1[0]); /* Return value */
}
else
return(0);
}
/*********************************************************************//**
* @brief Write Byte value at desired address(0x000 to 0x7FF)
* @param[in] SSPx SSP peripheral definition, should be:
* - LPC_SSP0: SSP0 peripheral
* - LPC_SSP1: SSP1 peripheral
* @param[in] eep_address EEPROM 16bit address
* @param[in] byte_data byte data to be written
* @return status byte
**********************************************************************/
uchar Ssp_Eeprom_Write_Byte (LPC_SSP_TypeDef *SSPx, uint16 eep_address, uint8_t byte_data)
{
SSP_DATA_SETUP_Type xferConfig;
uint8_t WriteData[1],WriteStatus =0;
Tx_Buf1[0] = EEP_WRITE; /* WRITE IR 8bit msb */
Tx_Buf1[1] = (uchar)(eep_address>>8); // 1st byte extract
Tx_Buf1[2] = (uchar) eep_address; // 2nd byte extract
Tx_Buf1[3] = byte_data; /* byte data lsb */
WriteData[0] = EEP_WREN;
CS_Force1 (SSPx, DISABLE);
xferConfig.tx_data = WriteData; /* Send Instruction Byte */
xferConfig.rx_data = Rx_Buf1; /* Store byte in Rx_Buf[0] */
xferConfig.length = 1;
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING); /* Write Enable Latch */
CS_Force1 (SSPx, ENABLE);
CS_Force1 (SSPx, DISABLE); /* CS low active */
xferConfig.tx_data = Tx_Buf1; /* Send Instruction Byte */
xferConfig.length = 4;
WriteStatus = SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
if(WriteStatus)
{
CS_Force1 (SSPx, ENABLE); /* CS high inactive */
delay_ms(4);
return(1);
}
else
return(0);
}
void spi_transfer(volatile U8* buf, U16 len, U8 toggle_cs)
{
U16 i;
// ZG2100_CSoff();
FIO_ClearValue(WF_CS_PORT, WF_CS_BIT);
// for (i = 0; i < len; i++) {
// ZG2100_SpiSendData(buf[i]); // Start the transmission
// buf[i] = ZG2100_SpiRecvData();
// }
SSP_DATA_SETUP_Type xferConfig;
xferConfig.tx_data = buf;
xferConfig.rx_data = buf;
xferConfig.length = len;
SSP_ReadWrite (WF_SPI_CHN, &xferConfig, SSP_TRANSFER_POLLING);
if (toggle_cs) {
// ZG2100_CSon();
FIO_SetValue(WF_CS_PORT, WF_CS_BIT);
}
return;
}
/******************************************************************************
*
* Description:
* Draw a character on the 7 segment display
*
* Params:
* [in] ch - character interpreted as an ascii character. Not all ascii
* characters can be realized on the display. If a character
* can't be realized all segments are off.
* [in] invertedMode - set to TRUE to use inverted mode. In this case the ch data
* if they are digits 0 - 9 will be inverted on the 7 segment display.
*
*****************************************************************************/
void led7seg_setChar(uint8_t ch, uint32_t invertedMode)
{
uint8_t val = 0xff;
SSP_DATA_SETUP_Type xferConfig;
// LED7_CS_ON();
if (ch >= '-' && ch <= '|') {
val = chars[ch - '-'];
}
if (invertedMode) {
val = invertedChars[ch - '-'];
}
xferConfig.tx_data = &val;
xferConfig.rx_data = NULL;
xferConfig.length = 1;
LED7_CS_ON();
//SSP_SendData(LPC_SSP1, val);
SSP_ReadWrite(LPC_SSP1, &xferConfig, SSP_TRANSFER_POLLING);
LED7_CS_OFF();
}
/*********************************************************************//**
* @brief Get the status about locked or unlocked memory blocks.
* @param[in] SSPx SSP peripheral definition, should be:
* - LPC_SSP0: SSP0 peripheral
* - LPC_SSP1: SSP1 peripheral
* @return status byte
**********************************************************************/
uint8_t Ssp_Eeprom_Read_Status_Reg (LPC_SSP_TypeDef *SSPx)
{
SSP_DATA_SETUP_Type xferConfig;
Tx_Buf1[0] = EEP_RDSR; /* Read Status 8bit msb */
CS_Force1 (SSPx, DISABLE); /* Select device */
xferConfig.tx_data = Tx_Buf1; /* Send Instruction Byte */
xferConfig.rx_data = Rx_Buf1; /* Store byte in Rx_Buf[0] */
xferConfig.length = 1;
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
xferConfig.tx_data = NULL; /* Send Instruction Byte */
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
if(Rx_Buf1[0])
{
CS_Force1 (SSPx, ENABLE); /* Select device */
return(Rx_Buf1[0]); /* Return value */
}
else
return(0);
}
/*********************************************************************//**
* @brief To lock or unlock data sectors
* @param[in] SSPx SSP peripheral definition, should be:
* - LPC_SSP0: SSP0 peripheral
* - LPC_SSP1: SSP1 peripheral
* @param[in] status_reg Write Status Value
* @return status byte
**********************************************************************/
uchar Ssp_Eeprom_Write_Status_Reg (LPC_SSP_TypeDef *SSPx, uint8_t status_reg)
{
SSP_DATA_SETUP_Type xferConfig;
uint8_t WriteData[1],WriteStatus =0;
Tx_Buf1[0] = EEP_WRSR; /* Write Status 8bit msb */
Tx_Buf1[1] = status_reg; /* STATUS REGISTER */
/* W/R W/R W/R R R */
/* D7 D6 D5 D4 D3 D2 D1 D0 */
/* WPEN X X X -- BP1 BP0 WEL WIP */
WriteData[0] = EEP_WREN;
CS_Force1 (SSPx, DISABLE); /* Select device */
xferConfig.tx_data = WriteData; /* Send Instruction Byte */
xferConfig.rx_data = Rx_Buf1; /* Store byte in Rx_Buf[0] */
xferConfig.length = 1;
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING); /* Write Enable Latch */
CS_Force1 (SSPx, ENABLE); /* CS high inactive */
CS_Force1 (SSPx, DISABLE); /* Select device */
xferConfig.tx_data = Tx_Buf1; /* Send Instruction Byte */
xferConfig.length = 2;
WriteStatus = SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
if(WriteStatus)
{
CS_Force1 (SSPx, ENABLE); /* CS high inactive */
delay_ms(4);
return(1);
}
else
return(0);
}
static u8_t rwACC(u8_t *p_wBuff, u8_t *p_rBuff, u8_t len){
//SSP_DATA_SETUP_Type SSPdata;
//if(!p_rBuff)
// return 1;
if(!p_wBuff)
return 1;
if(!len)
return 1;
HW_BMC_CsAccelerationOn();
SSP_ReadWrite(SSP_2, p_rBuff, p_wBuff,len);
HW_BMC_CsAccelerationOff();
return 0;
}
static u8_t rwMAG(u8_t *p_wBuff, u8_t *p_rBuff, u8_t len){
//SSP_DATA_SETUP_Type SSPdata;
//if(!p_rBuff)
// return 1;
if(!p_wBuff)
return 1;
if(!len)
return 1;
HW_BMC_CsMagnetometerOn();
SSP_ReadWrite(SSP_2, p_rBuff, p_wBuff,len);
HW_BMC_CsMagnetometerOff();
return 0;
}
void ssp_spi_txrx(uint8_t* bufTx, uint8_t lenbufTx, spi_return_t returnType, uint8_t* bufRx, uint8_t maxLenBufRx, spi_first_t isFirst, spi_last_t isLast){
uint32_t stat=0;
SSP_DATA_SETUP_Type data;
if (isFirst==SPI_FIRST) {
LPC_GPIO0->FIOCLR |=PIN_MASK_CS;
}
data.tx_data=bufTx; /**< Pointer to transmit data */
data.rx_data=bufRx; /**< Pointer to transmit data */
data.length=lenbufTx; /**< Length of transfer data */
stat= SSP_ReadWrite (LPC_SSP1, &data, SSP_TRANSFER_POLLING);
if (isLast==SPI_LAST) {
LPC_GPIO0->FIOSET |=PIN_MASK_CS;
}
}
int main(void)
{
volatile int timeKeeper=0;
unsigned char i=0;
SSP_CFG_Type sspChannelConfig;
SSP_DATA_SETUP_Type sspDataConfig;
uint8_t rxBuff[5];
uint8_t txBuff[5];
LPC_PINCON->PINSEL0 |= 0x2<<14; //SCK1
LPC_PINCON->PINSEL0 |= 0x2<<18; //MOSI1
PORT_CS->FIODIR |= 1<<2; //P2.2 as CSn
sspDataConfig.length = 1;
sspDataConfig.tx_data = txBuff;
sspDataConfig.rx_data = rxBuff;
SSP_ConfigStructInit(&sspChannelConfig);
SSP_Init(SSP_CHANNEL, &sspChannelConfig);
SSP_Cmd(SSP_CHANNEL, ENABLE);
while(1)
{
if (timeKeeper++ % 500000 == 0)
{
PORT_CS->FIOCLR |= PIN_MASK_CS; //CS low
txBuff[0] = segmentLUT[i++]; //Buffer next numeral
//Only display 0-9
if (i==10) i=0;
//Transfer to 7-Segment Display Driver
SSP_ReadWrite(SSP_CHANNEL, &sspDataConfig, SSP_TRANSFER_POLLING);
PORT_CS->FIOSET |= PIN_MASK_CS; //CS High
}
}
return 0 ;
}
/*********************************************************************//**
* @brief Write value array at desired address(0x000 to 0x7FF)
* @param[in] SSPx SSP peripheral definition, should be:
* - LPC_SSP0: SSP0 peripheral
* - LPC_SSP1: SSP1 peripheral
* @param[in] eep_address EEPROM 16bit address
* @param[in] data_start buffer address
* @param[in] length size of buffer
* @return write status
**********************************************************************/
uchar Ssp_Eeprom_Write (LPC_SSP_TypeDef *SSPx, uint16_t eep_address, uint8_t *data_start, uint8_t length)
{
SSP_DATA_SETUP_Type xferConfig;
uint8_t WriteData[1],WriteStatus =0,ip_len,new_length;
uint16 new_address;
WriteData[0] = EEP_WREN;
Tx_Buf1[0] = EEP_WRITE; // WRITE IR 8bit msb
Tx_Buf1[1] = (uchar)(eep_address>>8); // 1st byte extract
Tx_Buf1[2] = (uchar)eep_address; // 2nd byte extract
/* Intern page length(ip_len) gives length from address that can be occupied in page */
ip_len = 0x10 - (eep_address % 0x10);
new_address = eep_address + ip_len;
if(length > ip_len)
{
new_length = length - ip_len;
CS_Force1 (SSPx, DISABLE);
xferConfig.tx_data = WriteData; /* Send Instruction Byte */
xferConfig.rx_data = Rx_Buf1; /* Store byte in Rx_Buf[0] */
xferConfig.length = 1;
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING); /* Write Enable Latch */
CS_Force1 (SSPx, ENABLE);
CS_Force1 (SSPx, DISABLE); // CS low active
xferConfig.tx_data = Tx_Buf1; /* Send Instruction Byte */
xferConfig.length = 3;
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
xferConfig.tx_data = data_start; // Pass value
xferConfig.length = ip_len;
WriteStatus = SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
if(WriteStatus)
{
CS_Force1 (SSPx, ENABLE); /* CS high inactive */
}
else
return(0);
// Recursive function
delay_ms(4);
Ssp_Eeprom_Write(SSPx, new_address,(data_start + ip_len),new_length);
}
if(length <= ip_len+1)
{
CS_Force1 (SSPx, DISABLE);
xferConfig.tx_data = WriteData; /* Send Instruction Byte */
xferConfig.rx_data = Rx_Buf1; /* Store byte in Rx_Buf[0] */
xferConfig.length = 1;
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING); /* Write Enable Latch */
CS_Force1 (SSPx, ENABLE);
CS_Force1 (SSPx, DISABLE); // CS low
xferConfig.tx_data = Tx_Buf1; /* Send Instruction Byte */
xferConfig.length = 3;
SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
xferConfig.tx_data = data_start; // Pass value
xferConfig.length = length;
WriteStatus = SSP_ReadWrite(SSPx, &xferConfig, SSP_TRANSFER_POLLING);
if(WriteStatus)
{
CS_Force1 (SSPx, ENABLE); /* CS high inactive */
}
else
return(0);
}
return(1);
}
size_t FreeRTOS_SSP_write( Peripheral_Descriptor_t const pxPeripheral, const void *pvBuffer, const size_t xBytes )
{
Peripheral_Control_t * const pxPeripheralControl = ( Peripheral_Control_t * const ) pxPeripheral;
size_t xReturn = 0U;
LPC_SSP_TypeDef * const pxSSP = ( LPC_SSP_TypeDef * const ) diGET_PERIPHERAL_BASE_ADDRESS( ( ( Peripheral_Control_t * const ) pxPeripheral ) );
SSP_DATA_SETUP_Type *pxSSPTransferDefinition;
const uint32_t ulPeripheralNumber = ( uint32_t ) diGET_PERIPHERAL_NUMBER( ( ( Peripheral_Control_t * const ) pxPeripheral ) );
/* Remember which transfer control structure is being used, so if
an interrupt is being used, it can continue the same transfer until
all data has been transmitted. */
pxTxTransferControlStructs[ ulPeripheralNumber ] = diGET_TX_TRANSFER_STRUCT( pxPeripheralControl );
switch( diGET_TX_TRANSFER_TYPE( pxPeripheralControl ) )
{
case ioctlUSE_POLLED_TX :
#if ioconfigUSE_SSP_POLLED_TX == 1
{
/* Configure the transfer data. No semaphore or queue is used
here, so the application must ensure only one task attempts to
make a polling write at a time. */
pxSSPTransferDefinition = ( SSP_DATA_SETUP_Type * ) diGET_TX_TRANSFER_STATE( pxPeripheralControl );
configASSERT( pxSSPTransferDefinition );
pxSSPTransferDefinition->tx_data = ( void * ) pvBuffer;
pxSSPTransferDefinition->rx_data = NULL;
pxSSPTransferDefinition->length = ( uint32_t ) xBytes;
xReturn = SSP_ReadWrite( pxSSP, pxSSPTransferDefinition, SSP_TRANSFER_POLLING );
}
#endif /* ioconfigUSE_SSP_POLLED_TX */
/* The transfer struct is set back to NULL as the Tx is complete
before the above call to SSP_ReadWrite() completes. */
pxTxTransferControlStructs[ ulPeripheralNumber ] = NULL;
break;
case ioctlUSE_ZERO_COPY_TX :
#if ioconfigUSE_SSP_ZERO_COPY_TX == 1
{
/* The implementation of the zero copy write uses a semaphore
to indicate whether a write is complete (and so the buffer
being written free again) or not. The semantics of using a
zero copy write dictate that a zero copy write can only be
attempted by a task, once the semaphore has been successfully
obtained by that task. This ensure that only one task can
perform a zero copy write at any one time. Ensure the semaphore
is not currently available, if this function has been called
without it being obtained first then it is an error. */
configASSERT( xIOUtilsGetZeroCopyWriteMutex( pxPeripheralControl, ioctlOBTAIN_WRITE_MUTEX, 0U ) == 0 );
xReturn = xBytes;
ioutilsINITIATE_ZERO_COPY_TX
(
pxPeripheralControl,
SSP_IntConfig( pxSSP, sspRX_DATA_AVAILABLE_INTERRUPTS, DISABLE ), /* Disable interrupt. */
SSP_IntConfig( pxSSP, sspRX_DATA_AVAILABLE_INTERRUPTS, ENABLE ), /* Enable interrupt. */
prvFillFifoFromBuffer( pxSSP, ( uint8_t ** ) &( pvBuffer ), xBytes ), /* Write to peripheral function. The buffer is passed in by address as the pointer is incremented. */
pvBuffer, /* Data source. */
xReturn /* Number of bytes to be written. This will get set to zero if the write mutex is not held. */
);
}
#endif /* ioconfigUSE_SSP_ZERO_COPY_TX */
/* Remove compiler warnings in case the above is #defined out. */
( void ) prvFillFifoFromBuffer;
break;
case ioctlUSE_CHARACTER_QUEUE_TX :
#if ioconfigUSE_SSP_TX_CHAR_QUEUE == 1
{
/* The queue allows multiple tasks to attempt to write bytes,
but ensures only the highest priority of these tasks will
actually succeed. If two tasks of equal priority attempt to
write simultaneously, then the application must ensure mutual
exclusion, as time slicing could result in the strings being
sent to the queue becoming interleaved. */
xReturn = xIOUtilsSendCharsToTxQueue( pxPeripheralControl, ( ( uint8_t * ) pvBuffer ), xBytes );
ioutilsFILL_FIFO_FROM_TX_QUEUE(
pxPeripheralControl,
SSP_IntConfig( pxSSP, sspRX_DATA_AVAILABLE_INTERRUPTS, DISABLE ), /* Disable Rx interrupt. */
SSP_IntConfig( pxSSP, sspRX_DATA_AVAILABLE_INTERRUPTS, ENABLE ), /* Enable Rx interrupt. */
sspMAX_FIFO_DEPTH, /* Bytes to write to the FIFO. */
( pxSSP->SR & SSP_STAT_TXFIFO_NOTFULL ) != 0UL, /* FIFO not full. */
pxSSP->DR = SSP_DR_BITMASK( ucChar ) ); /* Tx function. */
}
#endif /* ioconfigUSE_SSP_RX_CHAR_QUEUE */
break;
default :
/* Other methods can be implemented here. For now, set the stored
Tx structure back to NULL as nothing is being sent. */
pxTxTransferControlStructs[ ulPeripheralNumber ] = NULL;
configASSERT( xReturn );
/* Prevent compiler warnings when the configuration is set such
that the following parameters are not used. */
( void ) pvBuffer;
( void ) xBytes;
( void ) pxSSP;
( void ) pxSSPTransferDefinition;
break;
}
return xReturn;
}
/*********************************************************************//**
* @brief c_entry: Main SSP program body
* @param[in] None
* @return int
**********************************************************************/
int c_entry(void)
{
uint8_t tmpchar[2] = {0, 0};
PINSEL_CFG_Type PinCfg;
__IO FlagStatus exitflag;
/*
* Initialize SPI pin connect
* P0.15 - SCK
* P0.16 - SSEL - used as GPIO
* P0.17 - MISO
* P0.18 - MOSI
*/
PinCfg.Funcnum = 2;
PinCfg.OpenDrain = 0;
PinCfg.Pinmode = 0;
PinCfg.Portnum = 0;
PinCfg.Pinnum = 15;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 17;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 18;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 16;
PinCfg.Funcnum = 0;
PINSEL_ConfigPin(&PinCfg);
/* Initialize debug via UART0
* – 115200bps
* – 8 data bit
* – No parity
* – 1 stop bit
* – No flow control
*/
debug_frmwrk_init();
// print welcome screen
print_menu();
// initialize SSP configuration structure to default
SSP_ConfigStructInit(&SSP_ConfigStruct);
// Initialize SSP peripheral with parameter given in structure above
SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
// Initialize /CS pin to GPIO function
CS_Init();
// Enable SSP peripheral
SSP_Cmd(LPC_SSP0, ENABLE);
/* preemption = 1, sub-priority = 1 */
NVIC_SetPriority(SSP0_IRQn, ((0x01<<3)|0x01));
/* Enable SSP0 interrupt */
NVIC_EnableIRQ(SSP0_IRQn);
/* First, send some command to reset SC16IS740 chip via SSP bus interface
* note driver /CS pin to low state before transferring by CS_Enable() function
*/
complete = RESET;
CS_Force(0);
xferConfig.tx_data = iocon_cfg;
xferConfig.rx_data = sspreadbuf;
xferConfig.length = sizeof (iocon_cfg);
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_INTERRUPT);
while (complete == RESET);
CS_Force(1);
complete = RESET;
CS_Force(0);
xferConfig.tx_data = iodir_cfg;
xferConfig.rx_data = sspreadbuf;
xferConfig.length = sizeof (iodir_cfg);
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_INTERRUPT);
while (complete == RESET);
CS_Force(1);
// Reset exit flag
exitflag = RESET;
/* Read some data from the buffer */
while (exitflag == RESET)
{
while((tmpchar[0] = _DG) == 0);
if (tmpchar[0] == 27){
/* ESC key, set exit flag */
_DBG_(menu2);
exitflag = SET;
}
else if (tmpchar[0] == 'r'){
print_menu();
} else {
if (tmpchar[0] == '1')
{
// LEDs are ON now...
CS_Force(0);
xferConfig.tx_data = iostate_on;
xferConfig.rx_data = sspreadbuf;
xferConfig.length = sizeof (iostate_on);
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
CS_Force(1);
}
else if (tmpchar[0] == '2')
{
// LEDs are OFF now...
CS_Force(0);
xferConfig.tx_data = iostate_off;
xferConfig.rx_data = sspreadbuf;
xferConfig.length = sizeof (iostate_off);
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
CS_Force(1);
}
/* Then Echo it back */
_DBG_(tmpchar);
}
}
// wait for current transmission complete - THR must be empty
while (UART_CheckBusy(LPC_UART0) == SET );
// DeInitialize UART0 peripheral
UART_DeInit(LPC_UART0);
/* Loop forever */
while(1);
return 1;
}
/*********************************************************************//**
* @brief c_entry: Main SSP program body
* @param[in] None
* @return int
**********************************************************************/
int c_entry(void)
{
#if __DMA_USED__
GPDMA_Channel_CFG_Type GPDMACfg;
#else
SSP_DATA_SETUP_Type xferConfig;
#endif
/*
* Initialize SSP pin connect
* P0.15 - SCK;
* P0.16 - SSEL
* P0.17 - MISO
* P0.18 - MOSI
*/
#if (_SSP_NO_USING == 0)
PINSEL_ConfigPin(0, 15, 2);
PINSEL_ConfigPin(0, 16, 2);
PINSEL_ConfigPin(0, 17, 2);
PINSEL_ConfigPin(0, 18, 2);
#elif (_SSP_NO_USING == 1)
PINSEL_ConfigPin(0, 6, 2);
PINSEL_ConfigPin(0, 7, 2);
PINSEL_SetFilter(0, 7, 0);
PINSEL_ConfigPin(0, 8, 2);
PINSEL_SetFilter(0, 8, 0);
PINSEL_ConfigPin(0, 9, 2);
PINSEL_SetFilter(0, 9, 0);
#else
PINSEL_ConfigPin(1, 0, 4);
PINSEL_ConfigPin(1, 8, 4);
PINSEL_ConfigPin(1, 1, 4);
PINSEL_ConfigPin(1, 4, 4);
#endif
/* Initialize debug via UART0
* – 115200bps
* – 8 data bit
* – No parity
* – 1 stop bit
* – No flow control
*/
debug_frmwrk_init();
// print welcome screen
print_menu();
// initialize SSP configuration structure to default
SSP_ConfigStructInit(&SSP_ConfigStruct);
// Initialize SSP peripheral with parameter given in structure above
SSP_Init(LPC_SSP, &SSP_ConfigStruct);
// Enable SSP peripheral
SSP_Cmd(LPC_SSP, ENABLE);
_DBG_("Press '1' to start transfer...");
while (_DG != '1');
/* Initialize Buffer */
_DBG_("Init buffer");
Buffer_Init();
_DBG_("Start transfer...");
#if __DMA_USED__
/* Initialize GPDMA controller */
GPDMA_Init();
/* Setting GPDMA interrupt */
// Disable interrupt for DMA
NVIC_DisableIRQ (DMA_IRQn);
/* preemption = 1, sub-priority = 1 */
NVIC_SetPriority(DMA_IRQn, ((0x01<<3)|0x01));
/* Configure GPDMA channel 0 -------------------------------------------------------------*/
/* DMA Channel 0 */
GPDMACfg.ChannelNum = 0;
// Source memory
GPDMACfg.SrcMemAddr = (uint32_t) &Tx_Buf;
// Destination memory - Not used
GPDMACfg.DstMemAddr = 0;
// Transfer size
GPDMACfg.TransferSize = sizeof(Tx_Buf);
// Transfer width - not used
GPDMACfg.TransferWidth = 0;
// Transfer type
GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
// Source connection - unused
GPDMACfg.SrcConn = 0;
// Destination connection
GPDMACfg.DstConn = SSP_TX_SRC_DMA_CONN;
// Linker List Item - unused
GPDMACfg.DMALLI = 0;
// Setup channel with given parameter
GPDMA_Setup(&GPDMACfg);
/* Reset terminal counter */
Channel0_TC = 0;
/* Reset Error counter */
Channel0_Err = 0;
/* Configure GPDMA channel 1 -------------------------------------------------------------*/
/* DMA Channel 1 */
GPDMACfg.ChannelNum = 1;
// Source memory - not used
GPDMACfg.SrcMemAddr = 0;
// Destination memory - Not used
GPDMACfg.DstMemAddr = (uint32_t) &Rx_Buf;
// Transfer size
GPDMACfg.TransferSize = sizeof(Rx_Buf);
// Transfer width - not used
GPDMACfg.TransferWidth = 0;
// Transfer type
GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_P2M;
// Source connection
GPDMACfg.SrcConn = SSP_RX_SRC_DMA_CONN;
// Destination connection - not used
GPDMACfg.DstConn = 0;
// Linker List Item - unused
GPDMACfg.DMALLI = 0;
// Setup channel with given parameter
GPDMA_Setup(&GPDMACfg);
/* Reset terminal counter */
Channel1_TC = 0;
/* Reset Error counter */
Channel1_Err = 0;
// Enable Tx and Rx DMA on SSP0
SSP_DMACmd (LPC_SSP, SSP_DMA_RX, ENABLE);
SSP_DMACmd (LPC_SSP, SSP_DMA_TX, ENABLE);
// Enable GPDMA channel 0
GPDMA_ChannelCmd(0, ENABLE);
// Enable GPDMA channel 0
GPDMA_ChannelCmd(1, ENABLE);
// Enable interrupt for DMA
NVIC_EnableIRQ (DMA_IRQn);
/* Wait for GPDMA processing complete */
while (((Channel0_TC == 0) && (Channel0_Err == 0)) \
|| ((Channel1_TC == 0) && (Channel1_Err ==0)));
#else
xferConfig.tx_data = Tx_Buf;
xferConfig.rx_data = Rx_Buf;
xferConfig.length = BUFFER_SIZE;
SSP_ReadWrite(LPC_SSP, &xferConfig, SSP_TRANSFER_POLLING);
#endif
// Verify buffer after transferring
Buffer_Verify();
_DBG_("Verify complete!");
/* Loop forever */
while(1);
}
size_t FreeRTOS_SSP_read( Peripheral_Descriptor_t const pxPeripheral, void * const pvBuffer, const size_t xBytes )
{
Peripheral_Control_t * const pxPeripheralControl = ( Peripheral_Control_t * const ) pxPeripheral;
size_t xReturn = 0U;
LPC_SSP_TypeDef * const pxSSP = ( LPC_SSP_TypeDef * const ) diGET_PERIPHERAL_BASE_ADDRESS( ( ( Peripheral_Control_t * const ) pxPeripheral ) );
SSP_DATA_SETUP_Type *pxSSPTransferDefinition;
const int8_t cPeripheralNumber = diGET_PERIPHERAL_NUMBER( ( ( Peripheral_Control_t * const ) pxPeripheral ) );
/* Sanity check the array index. */
configASSERT( cPeripheralNumber < ( int8_t ) ( sizeof( xIRQ ) / sizeof( IRQn_Type ) ) );
switch( diGET_RX_TRANSFER_TYPE( pxPeripheralControl ) )
{
case ioctlUSE_POLLED_RX :
#if ioconfigUSE_SSP_POLLED_RX == 1
{
/* Configure the transfer data. No semaphore or queue is used
here, so the application must ensure only one task attempts to
make a polling read at a time. *NOTE* the Tx transfer state
is used, as the SSP requires a Tx to occur for any data to be
received. */
pxSSPTransferDefinition = ( SSP_DATA_SETUP_Type * ) diGET_TX_TRANSFER_STATE( pxPeripheralControl );
configASSERT( pxSSPTransferDefinition );
pxSSPTransferDefinition->tx_data = NULL;
pxSSPTransferDefinition->rx_data = ( void * ) pvBuffer;
pxSSPTransferDefinition->length = ( uint32_t ) xBytes;
xReturn = SSP_ReadWrite( pxSSP, pxSSPTransferDefinition, SSP_TRANSFER_POLLING );
}
#endif /* ioconfigUSE_SSP_POLLED_RX */
break;
case ioctlUSE_CIRCULAR_BUFFER_RX :
/* _RB_ This relies on Tx being configured to zero copy mode. */
#if ioconfigUSE_SSP_CIRCULAR_BUFFER_RX == 1
{
/* There is nothing to prevent multiple tasks attempting to
read the circular buffer at any one time. The implementation
of the circular buffer uses a semaphore to indicate when new
data is available, and the semaphore will ensure that only the
highest priority task that is attempting a read will actually
receive bytes. */
/* A write is performed first, to generate the clock required
to clock the data in. NULL is passed as the source buffer as
there isn't actually any data to send, and NULL will just
result in 0xff being sent. When the data written to the FIFO
has been transmitted an Rx interrupt will copy the received
data into the circular buffer, and check to see if there is
more data to be written. */
/* Ensure the last Tx has completed. */
xReturn = xIOUtilsGetZeroCopyWriteMutex( pxPeripheralControl, ioctlOBTAIN_WRITE_MUTEX, ioutilsDEFAULT_ZERO_COPY_TX_MUTEX_BLOCK_TIME );
configASSERT( xReturn );
if( xReturn == pdPASS )
{
/* Empty whatever is lingering in the Rx buffer (there
shouldn't be any. */
vIOUtilsClearRxCircularBuffer( pxPeripheralControl );
/* Data should be received during the following write. */
ulReceiveActive[ cPeripheralNumber ] = pdTRUE;
/* Write to solicit received data. */
FreeRTOS_SSP_write( pxPeripheralControl, NULL, xBytes );
/* This macro will continuously wait on the new data mutex,
reading bytes from the circular buffer each time it
receives it, until the desired number of bytes have been
read. */
ioutilsRECEIVE_CHARS_FROM_CIRCULAR_BUFFER
(
pxPeripheralControl,
SSP_IntConfig( pxSSP, sspRX_DATA_AVAILABLE_INTERRUPTS, DISABLE ), /* Disable interrupt. */
SSP_IntConfig( pxSSP, sspRX_DATA_AVAILABLE_INTERRUPTS, ENABLE ), /* Enable interrupt. */
( ( uint8_t * ) pvBuffer ), /* Data destination. */
xBytes, /* Bytes to read. */
xReturn /* Number of bytes read. */
);
/* Not expecting any more Rx data now, so just junk anything
that is received until the next explicit read is performed. */
ulReceiveActive[ cPeripheralNumber ] = pdFALSE;
}
}
#endif
break;
case ioctlUSE_CHARACTER_QUEUE_RX :
/* The queue allows multiple tasks to attempt to read bytes,
but ensures only the highest priority of these tasks will
actually receive bytes. If two tasks of equal priority attempt
to read simultaneously, then the application must ensure mutual
exclusion, as time slicing could result in the string being
received being partially received by each task. */
#if ioconfigUSE_SSP_RX_CHAR_QUEUE == 1
{
/* Ensure the last Tx has completed. */
xIOUtilsWaitTxQueueEmpty( pxPeripheralControl, boardDEFAULT_READ_MUTEX_TIMEOUT );
/* Clear any residual data - there shouldn't be any! */
xIOUtilsClearRxCharQueue( pxPeripheralControl );
/* Data should be received during the following write. */
ulReceiveActive[ cPeripheralNumber ] = pdTRUE;
/* Write to solicit received data. */
FreeRTOS_SSP_write( pxPeripheralControl, NULL, xBytes );
/* Read the received data placed in the Rx queue by the
interrupt. */
xReturn = xIOUtilsReceiveCharsFromRxQueue( pxPeripheralControl, ( uint8_t * ) pvBuffer, xBytes );
/* Not expecting any more Rx data now, so just junk anything
that is received until the next explicit read is performed. */
ulReceiveActive[ cPeripheralNumber ] = pdFALSE;
}
#endif
break;
default :
/* Other methods can be implemented here. */
configASSERT( xReturn );
/* Prevent compiler warnings when the configuration is set such
that the following parameters are not used. */
( void ) pvBuffer;
( void ) xBytes;
( void ) pxSSP;
( void ) pxSSPTransferDefinition;
( void ) cPeripheralNumber;
break;
}
return xReturn;
}
/*********************************************************************//**
* @brief Main SSP program body
**********************************************************************/
int c_entry(void)
{
uint8_t tmpchar[2] = {0, 0};
PINSEL_CFG_Type PinCfg;
__IO FlagStatus exitflag;
SSP_DATA_SETUP_Type xferConfig;
// DeInit NVIC and SCBNVIC
NVIC_DeInit();
NVIC_SCBDeInit();
/* Configure the NVIC Preemption Priority Bits:
* two (2) bits of preemption priority, six (6) bits of sub-priority.
* Since the Number of Bits used for Priority Levels is five (5), so the
* actual bit number of sub-priority is three (3)
*/
NVIC_SetPriorityGrouping(0x05);
// Set Vector table offset value
#if (__RAM_MODE__==1)
NVIC_SetVTOR(0x10000000);
#else
NVIC_SetVTOR(0x00000000);
#endif
/*
* Initialize SPI pin connect
* P0.15 - SCK
* P0.16 - SSEL - used as GPIO
* P0.17 - MISO
* P0.18 - MOSI
*/
PinCfg.Funcnum = 2;
PinCfg.OpenDrain = 0;
PinCfg.Pinmode = 0;
PinCfg.Portnum = 0;
PinCfg.Pinnum = 15;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 17;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 18;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 16;
PinCfg.Funcnum = 0;
PINSEL_ConfigPin(&PinCfg);
/*
* Initialize debug via UART
*/
debug_frmwrk_init();
// print welcome screen
print_menu();
// initialize SSP configuration structure to default
SSP_ConfigStructInit(&SSP_ConfigStruct);
// Initialize SSP peripheral with parameter given in structure above
SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
// Initialize /CS pin to GPIO function
CS_Init();
// Enable SSP peripheral
SSP_Cmd(LPC_SSP0, ENABLE);
/* First, send some command to reset SC16IS740 chip via SSP bus interface
* note driver /CS pin to low state before transferring by CS_Enable() function
*/
CS_Force(0);
xferConfig.tx_data = iocon_cfg;
xferConfig.rx_data = sspreadbuf;
xferConfig.length = sizeof (iocon_cfg);
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
CS_Force(1);
CS_Force(0);
xferConfig.tx_data = iodir_cfg;
xferConfig.rx_data = sspreadbuf;
xferConfig.length = sizeof (iodir_cfg);
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
CS_Force(1);
// Reset exit flag
exitflag = RESET;
/* Read some data from the buffer */
while (exitflag == RESET)
{
while((tmpchar[0] = _DG) == 0);
if (tmpchar[0] == 27){
/* ESC key, set exit flag */
_DBG_(menu2);
exitflag = SET;
}
else if (tmpchar[0] == 'r'){
print_menu();
} else {
if (tmpchar[0] == '1')
{
// LEDs are ON now...
CS_Force(0);
xferConfig.tx_data = iostate_on;
xferConfig.rx_data = sspreadbuf;
xferConfig.length = sizeof (iostate_on);
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
CS_Force(1);
}
else if (tmpchar[0] == '2')
{
// LEDs are OFF now...
CS_Force(0);
xferConfig.tx_data = iostate_off;
xferConfig.rx_data = sspreadbuf;
xferConfig.length = sizeof (iostate_off);
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
CS_Force(1);
}
/* Then Echo it back */
_DBG_(tmpchar);
}
}
// wait for current transmission complete - THR must be empty
while (UART_CheckBusy(LPC_UART0) == SET);
// DeInitialize UART0 peripheral
UART_DeInit(LPC_UART0);
/* Loop forever */
while(1);
return 1;
}
