static void Int1Isr(void)
{
uint8_t regIntr1;
regIntr1 = SiiRegRead(REG_INTR1);
if (regIntr1)
{
SiiRegWrite(REG_INTR1,regIntr1);
if (BIT6 & regIntr1)
{
uint8_t cbusStatus;
cbusStatus = SiiRegRead(REG_MSC_REQ_ABORT_REASON);
TX_DEBUG_PRINT(("Drv: dsHpdStatus =%02X\n", (int) dsHpdStatus));
if(BIT6 & (dsHpdStatus ^ cbusStatus))
{
uint8_t status = cbusStatus & BIT6;
TX_DEBUG_PRINT(("Drv: Downstream HPD changed to: %02X\n", (int) cbusStatus));
SiiMhlTxNotifyDsHpdChange( status );
if(status)
{
AudioVideoIsr(true);
}
dsHpdStatus = cbusStatus;
}
}
if(BIT7 & regIntr1)
{
TX_DEBUG_PRINT(("MHL soft interrupt triggered \n"));
}
}
}
static void MhlTxDrvProcessDisconnection ( void )
{
TX_DEBUG_PRINT(("MhlTxDrvProcessDisconnection\n"));
SiiRegWrite(REG_INTR4, SiiRegRead(REG_INTR4));
dsHpdStatus &= ~BIT6;
SiiRegWrite(REG_MSC_REQ_ABORT_REASON, dsHpdStatus);
SiiMhlTxNotifyDsHpdChange(0);
if( POWER_STATE_D0_MHL == fwPowerState )
{
SiiMhlTxNotifyConnection(false);
}
SwitchToD3();
}
static void Int1Isr(void)
{
uint8_t regIntr1;
regIntr1 = SiiRegRead(REG_INTR1);
if (regIntr1)
{
// Clear all interrupts coming from this register.
SiiRegWrite(REG_INTR1,regIntr1);
if (BIT6 & regIntr1)
{
uint8_t cbusStatus;
//
// Check if a SET_HPD came from the downstream device.
//
cbusStatus = SiiRegRead(REG_PRI_XFR_ABORT_REASON);
// CBUS_HPD status bit
if(BIT6 & (dsHpdStatus ^ cbusStatus))
{
uint8_t status = cbusStatus & BIT6;
TX_DEBUG_PRINT(("Drv: Downstream HPD changed to: %02X\n", (int) cbusStatus));
// Inform upper layer of change in Downstream HPD
SiiMhlTxNotifyDsHpdChange( status );
if (status)
{
SiiMhlTxDrvReleaseUpstreamHPDControl(); // this triggers an EDID read if control has not yet been released
}
// Remember
dsHpdStatus = cbusStatus;
}
}
}
}
///////////////////////////////////////////////////////////////////////////
//
// MhlTxDrvProcessDisconnection
//
///////////////////////////////////////////////////////////////////////////
static void MhlTxDrvProcessDisconnection (void)
{
TX_DEBUG_PRINT(("Drv: MhlTxDrvProcessDisconnection\n"));
// clear all interrupts
SiiRegWrite(REG_INTR4, SiiRegRead(REG_INTR4));
SiiRegWrite(REG_MHLTX_CTL1, 0xD0);
dsHpdStatus &= ~BIT6; //cable disconnect implies downstream HPD low
SiiRegWrite(REG_PRI_XFR_ABORT_REASON, dsHpdStatus);
SiiMhlTxNotifyDsHpdChange(0);
if( POWER_STATE_D0_MHL == fwPowerState )
{
// Notify upper layer of cable removal
SiiMhlTxNotifyConnection(false);
}
// Now put chip in sleep mode
SwitchToD3();
}
