/**
* @brief Send by hardware IR frame.
* @param None
* @retval None
*/
void IR_Encode_SignalGenerate(void)
{
if((IR_Send_Operation_Ready_f != RESET) && (IR_BitsSent_Counter <= (IR_Encode_NbBits)))
{
/*Reset send operation complete flag*/
IR_Send_Operation_Completed_f = RESET;
if(IR_Pulse == 0)
{
/* IR pause */
TIM_ForcedOC1Config(TIM16, TIM_ForcedAction_InActive); //TIM_ForcedAction_InActive
/*Read message next bits*/
if(((IR_Frame >> IR_BitsSent_Counter) & 1) == SET)
{
IR_Pulse = 2; // IR bit 1
}
else
{
/******************************************************************************
* TIM1 Initialization Code Template
******************************************************************************/
void TIM1_Init()
{
TIM_TimeBaseInitTypeDef TIM_TimeBaseInitStruct;
#if (((STRCMP($ch1CCSel$, CH1_Cap_Func) == 1) && (STRCMP($ch1CCEnable$, ENABLE) == 1)) || \
((STRCMP($ch2CCSel$, CH2_Cap_Func) == 1) && (STRCMP($ch2CCEnable$, ENABLE) == 1)) || \
((STRCMP($ch3CCSel$, CH3_Cap_Func) == 1) && (STRCMP($ch3CCEnable$, ENABLE) == 1)) || \
((STRCMP($ch4CCSel$, CH4_Cap_Func) == 1) && (STRCMP($ch4CCEnable$, ENABLE) == 1)))
TIM_ICInitTypeDef TIM_ICInitStruct;
#endif
#if (((STRCMP($ch1CCSel$, CH1_Comp_Func) == 1) && (STRCMP($ch1CCEnable$, ENABLE) == 1)) || \
((STRCMP($ch2CCSel$, CH2_Comp_Func) == 1) && (STRCMP($ch2CCEnable$, ENABLE) == 1)) || \
((STRCMP($ch3CCSel$, CH3_Comp_Func) == 1) && (STRCMP($ch3CCEnable$, ENABLE) == 1)) || \
((STRCMP($ch4CCSel$, CH4_Comp_Func) == 1) && (STRCMP($ch4CCEnable$, ENABLE) == 1)))
TIM_OCInitTypeDef TIM_OCInitStruct;
#endif
#if(STRCMP($brkInt$ ,ENABLE) == 1 || STRCMP($upInt$ ,ENABLE) == 1 || STRCMP($tcInt$ ,0) == 0 || STRCMP($ccInt$ ,0) == 0)
NVIC_InitTypeDef NVIC_InitStructure;
#endif
//PUT_A_NEW_LINE_HERE
//
// Enable peripheral clock of TIM1
//
RCC_APB2PeriphClockCmd(RCC_APB2Periph_TIM1, ENABLE);
//PUT_A_NEW_LINE_HERE
//
// Time base configuration
//
TIM_TimeBaseStructInit(&TIM_TimeBaseInitStruct);
TIM_TimeBaseInitStruct.TIM_Period = $counterPeriod$;
TIM_TimeBaseInitStruct.TIM_Prescaler = $prescaler$;
TIM_TimeBaseInitStruct.TIM_ClockDivision = $clockDivision$;
TIM_TimeBaseInitStruct.TIM_CounterMode = $counterMode$;
TIM_TimeBaseInitStruct.TIM_RepetitionCounter = $repetition$;
TIM_TimeBaseInit(TIM1, &TIM_TimeBaseInitStruct);
#if (STRCMP($ch1CCEnable$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
#if (STRCMP($ch1CCSel$, CH1_Cap_Func) == 1)
//
// TIM1 Channel 1 Input Configuration
//
TIM_ICStructInit(&TIM_ICInitStruct);
TIM_ICInitStruct.TIM_Channel = TIM_Channel_1;
TIM_ICInitStruct.TIM_ICPolarity = $ch1ICPol$;
TIM_ICInitStruct.TIM_ICSelection = $ch1ICSel$;
TIM_ICInitStruct.TIM_ICPrescaler = $ch1ICPSC$;
TIM_ICInitStruct.TIM_ICFilter = $ch1ICFilter$;
TIM_ICInit(TIM1, &TIM_ICInitStruct);
#endif
#if (STRCMP($ch1CCSel$, CH1_Comp_Func) ==1)
//
// TIM1 Channel 1 Output configuration
//
TIM_OCStructInit(&TIM_OCInitStruct);
TIM_OCInitStruct.TIM_OCMode = $ch1OutputMode$;
TIM_OCInitStruct.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStruct.TIM_Pulse = $ch1PsValue$;
TIM_OCInitStruct.TIM_OCPolarity = $ch1OCPol$;
TIM_OCInitStruct.TIM_OCIdleState = $ch1IdleState$;
TIM_OC1Init(TIM1, &TIM_OCInitStruct);
TIM_ForcedOC1Config(TIM1, $ch1ForceAction$);
#if (STRCMP($ch1CCRPreload$, ENABLE) == 1)
TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable);
#endif
#if (STRCMP($ch1OREFClear$, ENABLE) == 1)
TIM_ClearOC1Ref(TIM1, TIM_OCClear_Enable);
#endif
#endif
#endif
#if (STRCMP($ch2CCEnable$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
#if (STRCMP($ch2CCSel$, CH2_Cap_Func) == 1)
//
// TIM1 Channel 2 Input Configuration
//
TIM_ICStructInit(&TIM_ICInitStruct);
TIM_ICInitStruct.TIM_Channel = TIM_Channel_2;
TIM_ICInitStruct.TIM_ICPolarity = $ch2ICPol$;
TIM_ICInitStruct.TIM_ICSelection = $ch2ICSel$;
TIM_ICInitStruct.TIM_ICPrescaler = $ch2ICPSC$;
TIM_ICInitStruct.TIM_ICFilter = $ch2ICFilter$;
TIM_ICInit(TIM1, &TIM_ICInitStruct);
#endif
#if (STRCMP($ch2CCSel$, CH2_Comp_Func) ==1)
//
// TIM1 Channel 2 Output configuration
//
TIM_OCStructInit(&TIM_OCInitStruct);
TIM_OCInitStruct.TIM_OCMode = $ch2OutputMode$;
TIM_OCInitStruct.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStruct.TIM_Pulse = $ch2PsValue$;
TIM_OCInitStruct.TIM_OCPolarity = $ch2OCPol$;
TIM_OCInitStruct.TIM_OCIdleState = $ch2IdleState$;
TIM_OC2Init(TIM1, &TIM_OCInitStruct);
TIM_ForcedOC2Config(TIM1, $ch2ForceAction$);
#if (STRCMP($ch2CCRPreload$, ENABLE) == 1)
TIM_OC2PreloadConfig(TIM1, TIM_OCPreload_Enable);
#endif
#if (STRCMP($ch2OREFClear$, ENABLE) == 1)
TIM_ClearOC2Ref(TIM1, TIM_OCClear_Enable);
#endif
#endif
#endif
#if (STRCMP($ch3CCEnable$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
#if (STRCMP($ch3CCSel$, CH3_Cap_Func) == 1)
//
// TIM1 Channel 3 Input Configuration
//
TIM_ICStructInit(&TIM_ICInitStruct);
TIM_ICInitStruct.TIM_Channel = TIM_Channel_3;
TIM_ICInitStruct.TIM_ICPolarity = $ch3ICPol$;
TIM_ICInitStruct.TIM_ICSelection = $ch3ICSel$;
TIM_ICInitStruct.TIM_ICPrescaler = $ch3ICPSC$;
TIM_ICInitStruct.TIM_ICFilter = $ch3ICFilter$;
TIM_ICInit(TIM1, &TIM_ICInitStruct);
#endif
#if (STRCMP($ch3CCSel$, CH3_Comp_Func) ==1)
//
// TIM1 Channel 3 Output configuration
//
TIM_OCStructInit(&TIM_OCInitStruct);
TIM_OCInitStruct.TIM_OCMode = $ch3OutputMode$;
TIM_OCInitStruct.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStruct.TIM_Pulse = $ch3PsValue$;
TIM_OCInitStruct.TIM_OCPolarity = $ch3OCPol$;
TIM_OCInitStruct.TIM_OCIdleState = $ch3IdleState$;
TIM_OC3Init(TIM1, &TIM_OCInitStruct);
TIM_ForcedOC3Config(TIM1, $ch3ForceAction$);
#if (STRCMP($ch3CCRPreload$, ENABLE) == 1)
TIM_OC3PreloadConfig(TIM1, TIM_OCPreload_Enable);
#endif
#if (STRCMP($ch3OREFClear$, ENABLE) == 1)
TIM_ClearOC3Ref(TIM1, TIM_OCClear_Enable);
#endif
#endif
#endif
#if (STRCMP($ch4CCEnable$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
#if (STRCMP($ch4CCSel$, CH4_Cap_Func) == 1)
//
// TIM1 Channel 4 Input Configuration
//
TIM_ICStructInit(&TIM_ICInitStruct);
TIM_ICInitStruct.TIM_Channel = TIM_Channel_4;
TIM_ICInitStruct.TIM_ICPolarity = $ch4ICPol$;
TIM_ICInitStruct.TIM_ICSelection = $ch4ICSel$;
TIM_ICInitStruct.TIM_ICPrescaler = $ch4ICPSC$;
TIM_ICInitStruct.TIM_ICFilter = $ch4ICFilter$;
TIM_ICInit(TIM1, &TIM_ICInitStruct);
#endif
#if (STRCMP($ch4CCSel$, CH4_Comp_Func) ==1)
//
// TIM1 Channel 4 Output configuration
//
TIM_OCStructInit(&TIM_OCInitStruct);
TIM_OCInitStruct.TIM_OCMode = $ch4OutputMode$;
TIM_OCInitStruct.TIM_OutputState = TIM_OutputState_Enable;
TIM_OCInitStruct.TIM_Pulse = $ch4PsValue$;
TIM_OCInitStruct.TIM_OCPolarity = $ch4OCPol$;
TIM_OCInitStruct.TIM_OCIdleState = $ch4IdleState$;
TIM_OC4Init(TIM1, &TIM_OCInitStruct);
TIM_ForcedOC4Config(TIM1, $ch4ForceAction$);
#if (STRCMP($ch4CCRPreload$, ENABLE) == 1)
TIM_OC4PreloadConfig(TIM1, TIM_OCPreload_Enable);
#endif
#if (STRCMP($ch4OREFClear$, ENABLE) == 1)
TIM_ClearOC4Ref(TIM1, TIM_OCClear_Enable);
#endif
#endif
#endif
#if (STRCMP($upEVDis$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
//
// Enable the Update event
//
TIM_UpdateDisableConfig(TIM1, DISABLE);
TIM_UpdateRequestConfig(TIM1, $requestIntSrc$);
#endif
#if ((STRCMP($extTriEnable$, ENABLE) == 1) && (STRCMP($extClkEnable$, ENABLE) == 1))
#if (STRCMP($extClkMode$, MODE1) == 1)
//PUT_A_NEW_LINE_HERE
//
// ETR clock Mode1 Config
//
TIM_ETRClockMode1Config(TIM1, $exTriPSCSet$, $exTriPolSet$, $exTriFilterSet$);
#endif
#if (STRCMP($extClkMode$, MODE2) == 1)
//PUT_A_NEW_LINE_HERE
//
// ETR clock Mode2 Config
//
TIM_ETRClockMode2Config(TIM1, $exTriPSCSet$, $exTriPolSet$, $exTriFilterSet$);
#endif
#endif
#if ((STRCMP($intTriEnable$, ENABLE) == 1) && (STRCMP($extClkEnable$, ENABLE) == 1))
//PUT_A_NEW_LINE_HERE
//
// ITR clock Config
//
TIM_ITRxExternalClockConfig(TIM1, $intTriSrc$);
#endif
#if (STRCMP($mmEnable$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
//
// Master Mode selection
//
TIM_SelectMasterSlaveMode(TIM1, TIM_MasterSlaveMode_Enable);
#endif
#if (STRCMP($smEnable$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
//
// Slave Mode selection
//
TIM_SelectSlaveMode(TIM1, $smSel$);
#endif
#if (STRCMP($hsiEnable$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
//
// Enable Hall Sensor Interface
//
TIM_SelectHallSensor(TIM1, ENABLE);
#endif
#if (STRCMP($spmEnable$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
//
// Single Pulse Mode selection
//
TIM_SelectOnePulseMode(TIM1, $spmSet$);
#endif
#if (STRCMP($tomEnable$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
//
// Trigger Output Mode selection
//
TIM_SelectOutputTrigger(TIM1, $tomSrc$);
#endif
#if (STRCMP($eimEnable$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
//
// Encoder Interface Mode selection
//
TIM_EncoderInterfaceConfig(TIM1, $eimSet$,
$encodeIC1Polar$, $encodeIC2Polar$);
#endif
//PUT_A_NEW_LINE_HERE
//
// Enable TIM1
//
TIM_Cmd(TIM1, ENABLE);
#if(STRCMP($brkInt$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
//
// Enable BRK Interrupt
//
TIM_ITConfig(TIM1, TIM_IT_Break, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = TIM1_BRK_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
#endif
#if(STRCMP($upInt$, ENABLE) == 1)
//PUT_A_NEW_LINE_HERE
//
// Enable UP Interrupt
//
TIM_ITConfig(TIM1, TIM_IT_Update, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = TIM1_UP_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
#endif
#if(STRCMP($tcInt$, 0) == 0)
//PUT_A_NEW_LINE_HERE
//
// Enable TRG/COM Interrupt
//
TIM_ITConfig(TIM1, $TCInt$, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = TIM1_TRG_COM_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
#endif
#if(STRCMP($ccInt$, 0) == 0)
//PUT_A_NEW_LINE_HERE
//
// Enable CC Interrupt
//
TIM_ITConfig(TIM1, $CCInt$, ENABLE);
NVIC_InitStructure.NVIC_IRQChannel = TIM1_CC_IRQn;
NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
NVIC_Init(&NVIC_InitStructure);
#endif
}
