static void rt2800pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, const enum data_queue_qid queue_idx) { struct data_queue *queue; unsigned int idx, qidx = 0; u32 reg; if (queue_idx == QID_BEACON) { rt2800_register_read(rt2x00dev, BCN_TIME_CFG, ®); if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) { rt2x00_set_field32(®, BCN_TIME_CFG_TSF_TICKING, 1); rt2x00_set_field32(®, BCN_TIME_CFG_TBTT_ENABLE, 1); rt2x00_set_field32(®, BCN_TIME_CFG_BEACON_GEN, 1); rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); } return; } if (queue_idx > QID_HCCA && queue_idx != QID_MGMT) return; queue = rt2x00queue_get_queue(rt2x00dev, queue_idx); idx = queue->index[Q_INDEX]; if (queue_idx == QID_MGMT) qidx = 5; else qidx = queue_idx; rt2800_register_write(rt2x00dev, TX_CTX_IDX(qidx), idx); }
static void rt2800pci_kick_queue(struct data_queue *queue) { struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; struct queue_entry *entry; switch (queue->qid) { case QID_AC_VO: case QID_AC_VI: case QID_AC_BE: case QID_AC_BK: entry = rt2x00queue_get_entry(queue, Q_INDEX); rt2800_register_write(rt2x00dev, TX_CTX_IDX(queue->qid), entry->entry_idx); break; case QID_MGMT: entry = rt2x00queue_get_entry(queue, Q_INDEX); rt2800_register_write(rt2x00dev, TX_CTX_IDX(5), entry->entry_idx); break; default: break; } }