S12Sci_StatusType S12Sci_RxBufFlush(S12Sci_ConfigType const * const Cfg) { Utl_MemSet((void *)Cfg->Vars->RxBufAddr, ((uint8)0x00), Cfg->Vars->RxBufLength); Cfg->Vars->RxHead = ((uint8)0x00); Cfg->Vars->RxTail = ((uint8)0x00); return S12SCI_OK; }
void KnxLL_Init(void) #endif /* KSTACK_MEMORY_MAPPING */ { rcvState = TPSR_WAIT_RESET_IND; RcvLen = RcvIdx = (uint8)0x00; AckService = (uint8)0x00; rcvService = SERVICE_NONE; Utl_MemSet(TpuartRcvBuf, 0, BUF_LEN); rcvState = TPSR_WAIT; }
boolean KnxMSG_ClearBuffer(KnxMSG_BufferPtr ptr) #endif /* KSTACK_MEMORY_MAPPING */ { uint8 * pb; if (ptr == (KnxMSG_BufferPtr)NULL) { return FALSE; } pb = (uint8 *)ptr; pb++; Utl_MemSet(pb, '\0', sizeof(KnxMSG_Buffer) - 1); return TRUE; }
void ClearMessageBuffer(uint8 buf_num) #endif /* KSTACK_MEMORY_MAPPING */ { KnxMSG_BufferPtr ptr; uint8 * pb; ptr = GetBufferAddress(buf_num); if (ptr == (KnxMSG_BufferPtr)NULL) { return; } pb = (uint8 *)ptr; pb++; Utl_MemSet(pb, '\0', (uint16)sizeof(KnxMSG_Buffer) - (uint16)1); }
void S12Sci_Init(uint8 Controller) { VAR(uint16, AUTOMATIC) Base = S12Sci_ControllerMapping[Controller]; S12Sci_ConfigType const * const ConfigPtr = &S12Sci_Configuration[Controller]; S12SCI_REG8(Base, SCICR2) = ((uint8)0x00); Utl_MemSet(ConfigPtr->Vars, '\0', sizeof(S12Sci_VariablesType)); /* S12Sci_SetFormat(Controller, ConfigPtr->BaudRate, ConfigPtr->Parity, ConfigPtr->NBits); */ S12SCI_REG8(Base, SCISR2) = (BRK13); S12Sci_SetRxBuffer(ConfigPtr, ConfigPtr->RxBufAddr, ConfigPtr->RxBufLength); S12Sci_RxBufFlush(ConfigPtr); S12Sci_SetTxBuffer(ConfigPtr, (uint8 *)NULL, (uint8)0); S12Sci_TxBufFlush(ConfigPtr); S12SCI_REG8(Base, SCICR1) = ((uint8)0x00); S12SCI_REG8(Base, SCICR2) = (TE | RE); S12Sci_EnableInterrupts(Controller, FALSE); }