void
sparc64_init(caddr_t mdp, u_long o1, u_long o2, u_long o3, ofw_vec_t *vec)
{
char *env;
struct pcpu *pc;
vm_offset_t end;
vm_offset_t va;
caddr_t kmdp;
phandle_t root;
u_int cpu_impl;
end = 0;
kmdp = NULL;
/*
* Find out what kind of CPU we have first, for anything that changes
* behaviour.
*/
cpu_impl = VER_IMPL(rdpr(ver));
/*
* Do CPU-specific initialization.
*/
if (cpu_impl >= CPU_IMPL_ULTRASPARCIII)
cheetah_init(cpu_impl);
else if (cpu_impl == CPU_IMPL_SPARC64V)
zeus_init(cpu_impl);
/*
* Clear (S)TICK timer (including NPT).
*/
tick_clear(cpu_impl);
/*
* UltraSparc II[e,i] based systems come up with the tick interrupt
* enabled and a handler that resets the tick counter, causing DELAY()
* to not work properly when used early in boot.
* UltraSPARC III based systems come up with the system tick interrupt
* enabled, causing an interrupt storm on startup since they are not
* handled.
*/
tick_stop(cpu_impl);
/*
* Set up Open Firmware entry points.
*/
ofw_tba = rdpr(tba);
ofw_vec = (u_long)vec;
/*
* Parse metadata if present and fetch parameters. Must be before the
* console is inited so cninit gets the right value of boothowto.
*/
if (mdp != NULL) {
preload_metadata = mdp;
kmdp = preload_search_by_type("elf kernel");
if (kmdp != NULL) {
boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
end = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
kernel_tlb_slots = MD_FETCH(kmdp, MODINFOMD_DTLB_SLOTS,
int);
kernel_tlbs = (void *)preload_search_info(kmdp,
MODINFO_METADATA | MODINFOMD_DTLB);
}
void
cpu_identify(u_long vers, u_int freq, u_int id)
{
const char *manus;
const char *impls;
switch (VER_MANUF(vers)) {
case 0x04:
manus = "HAL/Fujitsu";
break;
case 0x13:
case 0x17:
case 0x22:
case 0x3e:
manus = "Sun Microsystems";
break;
default:
manus = NULL;
break;
}
switch (VER_IMPL(vers)) {
case CPU_IMPL_SPARC64:
impls = "SPARC64";
break;
case CPU_IMPL_SPARC64II:
impls = "SPARC64-II";
break;
case CPU_IMPL_SPARC64III:
impls = "SPARC64-III";
break;
case CPU_IMPL_SPARC64IV:
impls = "SPARC64-IV";
break;
case CPU_IMPL_SPARC64V:
impls = "SPARC64-V";
break;
case CPU_IMPL_SPARC64VI:
impls = "SPARC64-VI";
break;
case CPU_IMPL_SPARC64VII:
impls = "SPARC64-VII";
break;
case CPU_IMPL_SPARC64VIIIfx:
impls = "SPARC64-VIIIfx";
break;
case CPU_IMPL_ULTRASPARCI:
impls = "UltraSparc-I";
break;
case CPU_IMPL_ULTRASPARCII:
impls = "UltraSparc-II";
break;
case CPU_IMPL_ULTRASPARCIIi:
impls = "UltraSparc-IIi";
break;
case CPU_IMPL_ULTRASPARCIIe:
impls = "UltraSparc-IIe";
break;
case CPU_IMPL_ULTRASPARCIII:
impls = "UltraSparc-III";
break;
case CPU_IMPL_ULTRASPARCIIIp:
impls = "UltraSparc-III+";
break;
case CPU_IMPL_ULTRASPARCIIIi:
impls = "UltraSparc-IIIi";
break;
case CPU_IMPL_ULTRASPARCIV:
impls = "UltraSparc-IV";
break;
case CPU_IMPL_ULTRASPARCIVp:
impls = "UltraSparc-IV+";
break;
case CPU_IMPL_ULTRASPARCIIIip:
impls = "UltraSparc-IIIi+";
break;
default:
impls = NULL;
break;
}
if (manus == NULL || impls == NULL) {
printf(
"CPU: unknown; please e-mail the following value together\n"
" with the exact name of your processor to "
"<*****@*****.**>.\n"
" version register: <0x%lx>\n", vers);
return;
}
snprintf(cpu_model, sizeof(cpu_model), "%s %s", manus, impls);
printf("cpu%d: %s %s Processor (%d.%02d MHz CPU)\n", id, manus, impls,
(freq + 4999) / 1000000, ((freq + 4999) / 10000) % 100);
if (bootverbose) {
printf(" mask=0x%lx maxtl=%ld maxwin=%ld\n", VER_MASK(vers),
VER_MAXTL(vers), VER_MAXWIN(vers));
}
/*
* Calculate the average CPU frequency.
*/
freq = (freq + 500000ul) / 1000000ul;
cpu_freq = (cpu_freq * cpu_count + freq) / (cpu_count + 1);
cpu_count++;
}
