return 0; } static const VMStateDescription vmstate_rtc = { .name = "mc146818rtc", .version_id = 3, .minimum_version_id = 1, .post_load = rtc_post_load, .fields = (VMStateField[]) { VMSTATE_BUFFER(cmos_data, RTCState), VMSTATE_UINT8(cmos_index, RTCState), VMSTATE_UNUSED(7*4), VMSTATE_TIMER(periodic_timer, RTCState), VMSTATE_INT64(next_periodic_time, RTCState), VMSTATE_UNUSED(3*8), VMSTATE_UINT32_V(irq_coalesced, RTCState, 2), VMSTATE_UINT32_V(period, RTCState, 2), VMSTATE_UINT64_V(base_rtc, RTCState, 3), VMSTATE_UINT64_V(last_update, RTCState, 3), VMSTATE_INT64_V(offset, RTCState, 3), VMSTATE_TIMER_V(update_timer, RTCState, 3), VMSTATE_UINT64_V(next_alarm_time, RTCState, 3), VMSTATE_END_OF_LIST() } }; static void rtc_notify_clock_reset(Notifier *notifier, void *data) { RTCState *s = container_of(notifier, RTCState, clock_reset_notifier); int64_t now = *(int64_t *)data;
VMSTATE_UINT64_ARRAY(env.regs, S390CPU, 16), VMSTATE_UINT64(env.psw.mask, S390CPU), VMSTATE_UINT64(env.psw.addr, S390CPU), VMSTATE_UINT64(env.psa, S390CPU), VMSTATE_UINT32(env.todpr, S390CPU), VMSTATE_UINT64(env.pfault_token, S390CPU), VMSTATE_UINT64(env.pfault_compare, S390CPU), VMSTATE_UINT64(env.pfault_select, S390CPU), VMSTATE_UINT64(env.cputm, S390CPU), VMSTATE_UINT64(env.ckc, S390CPU), VMSTATE_UINT64(env.gbea, S390CPU), VMSTATE_UINT64(env.pp, S390CPU), VMSTATE_UINT32_ARRAY(env.aregs, S390CPU, 16), VMSTATE_UINT64_ARRAY(env.cregs, S390CPU, 16), VMSTATE_UINT8(env.cpu_state, S390CPU), VMSTATE_UINT8(env.sigp_order, S390CPU), VMSTATE_UINT32_V(irqstate_saved_size, S390CPU, 4), VMSTATE_VBUFFER_UINT32(irqstate, S390CPU, 4, NULL, irqstate_saved_size), VMSTATE_END_OF_LIST() }, .subsections = (const VMStateDescription*[]) { &vmstate_fpu, &vmstate_vregs, &vmstate_riccb, &vmstate_exval, &vmstate_gscb, NULL }, };
uint32_t *db_clock_reset; } arm_sysctl_state; static const VMStateDescription vmstate_arm_sysctl = { .name = "realview_sysctl", .version_id = 4, .minimum_version_id = 1, .fields = (VMStateField[]) { VMSTATE_UINT32(leds, arm_sysctl_state), VMSTATE_UINT16(lockval, arm_sysctl_state), VMSTATE_UINT32(cfgdata1, arm_sysctl_state), VMSTATE_UINT32(cfgdata2, arm_sysctl_state), VMSTATE_UINT32(flags, arm_sysctl_state), VMSTATE_UINT32(nvflags, arm_sysctl_state), VMSTATE_UINT32(resetlevel, arm_sysctl_state), VMSTATE_UINT32_V(sys_mci, arm_sysctl_state, 2), VMSTATE_UINT32_V(sys_cfgdata, arm_sysctl_state, 2), VMSTATE_UINT32_V(sys_cfgctrl, arm_sysctl_state, 2), VMSTATE_UINT32_V(sys_cfgstat, arm_sysctl_state, 2), VMSTATE_UINT32_V(sys_clcd, arm_sysctl_state, 3), VMSTATE_UINT32_ARRAY_V(mb_clock, arm_sysctl_state, 6, 4), VMSTATE_VARRAY_UINT32(db_clock, arm_sysctl_state, db_num_clocks, 4, vmstate_info_uint32, uint32_t), VMSTATE_END_OF_LIST() } }; /* The PB926 actually uses a different format for * its SYS_ID register. Fortunately the bits which are * board type on later boards are distinct. */
static bool is_version_1(void *opaque, int version_id) { return version_id == 1; } static const VMStateDescription vmstate_fw_cfg = { .name = "fw_cfg", .version_id = 2, .minimum_version_id = 1, .minimum_version_id_old = 1, .fields = (VMStateField []) { VMSTATE_UINT16(cur_entry, FWCfgState), VMSTATE_UINT16_HACK(cur_offset, FWCfgState, is_version_1), VMSTATE_UINT32_V(cur_offset, FWCfgState, 2), VMSTATE_END_OF_LIST() } }; void fw_cfg_add_bytes(FWCfgState *s, uint16_t key, void *data, size_t len) { int arch = !!(key & FW_CFG_ARCH_LOCAL); key &= FW_CFG_ENTRY_MASK; assert(key < FW_CFG_MAX_ENTRY && len < UINT32_MAX); s->entries[arch][key].data = data; s->entries[arch][key].len = (uint32_t)len; }
VMSTATE_UINT32(ibe, pl061_state), VMSTATE_UINT32(iev, pl061_state), VMSTATE_UINT32(im, pl061_state), VMSTATE_UINT32(istate, pl061_state), VMSTATE_UINT32(afsel, pl061_state), VMSTATE_UINT32(dr2r, pl061_state), VMSTATE_UINT32(dr4r, pl061_state), VMSTATE_UINT32(dr8r, pl061_state), VMSTATE_UINT32(odr, pl061_state), VMSTATE_UINT32(pur, pl061_state), VMSTATE_UINT32(pdr, pl061_state), VMSTATE_UINT32(slr, pl061_state), VMSTATE_UINT32(den, pl061_state), VMSTATE_UINT32(cr, pl061_state), VMSTATE_UINT32(float_high, pl061_state), VMSTATE_UINT32_V(amsel, pl061_state, 2), VMSTATE_END_OF_LIST() } }; static void pl061_update(pl061_state *s) { uint8_t changed; uint8_t mask; uint8_t out; int i; /* Outputs float high. */ /* FIXME: This is board dependent. */ out = (s->data & s->dir) | ~s->dir; changed = s->old_data ^ out;
return 0; } static const VMStateDescription vmstate_ioapic_common = { .name = "ioapic", .version_id = 3, .minimum_version_id = 1, .minimum_version_id_old = 1, .pre_save = ioapic_dispatch_pre_save, .post_load = ioapic_dispatch_post_load, .fields = (VMStateField[]) { VMSTATE_UINT8(id, IOAPICCommonState), VMSTATE_UINT8(ioregsel, IOAPICCommonState), VMSTATE_UNUSED_V(2, 8), /* to account for qemu-kvm's v2 format */ VMSTATE_UINT32_V(irr, IOAPICCommonState, 2), VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICCommonState, IOAPIC_NUM_PINS), VMSTATE_END_OF_LIST() } }; static void ioapic_common_class_init(ObjectClass *klass, void *data) { SysBusDeviceClass *sc = SYS_BUS_DEVICE_CLASS(klass); DeviceClass *dc = DEVICE_CLASS(klass); sc->init = ioapic_init_common; dc->vmsd = &vmstate_ioapic_common; dc->no_user = 1; }
VMSTATE_UINT32_ARRAY(tx_status_fifo, lan9118_state, 512), VMSTATE_INT32(rx_status_fifo_size, lan9118_state), VMSTATE_INT32(rx_status_fifo_used, lan9118_state), VMSTATE_INT32(rx_status_fifo_head, lan9118_state), VMSTATE_UINT32_ARRAY(rx_status_fifo, lan9118_state, 896), VMSTATE_INT32(rx_fifo_size, lan9118_state), VMSTATE_INT32(rx_fifo_used, lan9118_state), VMSTATE_INT32(rx_fifo_head, lan9118_state), VMSTATE_UINT32_ARRAY(rx_fifo, lan9118_state, 3360), VMSTATE_INT32(rx_packet_size_head, lan9118_state), VMSTATE_INT32(rx_packet_size_tail, lan9118_state), VMSTATE_INT32_ARRAY(rx_packet_size, lan9118_state, 1024), VMSTATE_INT32(rxp_offset, lan9118_state), VMSTATE_INT32(rxp_size, lan9118_state), VMSTATE_INT32(rxp_pad, lan9118_state), VMSTATE_UINT32_V(write_word_prev_offset, lan9118_state, 2), VMSTATE_UINT32_V(write_word_n, lan9118_state, 2), VMSTATE_UINT16_V(write_word_l, lan9118_state, 2), VMSTATE_UINT16_V(write_word_h, lan9118_state, 2), VMSTATE_UINT32_V(read_word_prev_offset, lan9118_state, 2), VMSTATE_UINT32_V(read_word_n, lan9118_state, 2), VMSTATE_UINT32_V(read_long, lan9118_state, 2), VMSTATE_UINT32_V(mode_16bit, lan9118_state, 2), VMSTATE_END_OF_LIST() } }; static void lan9118_update(lan9118_state *s) { int level;