VOID
ScsiPortWriteRegisterBufferUchar(
IN PUCHAR Register,
IN PUCHAR Buffer,
IN ULONG Count
)
/*++
Routine Description:
Write a buffer of unsigned bytes from the specified register address.
Arguments:
Register - Supplies a pointer to the port address.
Buffer - Supplies a pointer to the data buffer area.
Count - The count of items to move.
Return Value:
None
--*/
{
WRITE_REGISTER_BUFFER_UCHAR(Register, Buffer, Count);
}
VOID
NTAPI
ScsiPortWriteRegisterBufferUchar(
IN PUCHAR Register,
IN PUCHAR Buffer,
IN ULONG Count)
{
WRITE_REGISTER_BUFFER_UCHAR(Register, Buffer, Count);
}
VOID
NTAPI
VideoPortWriteRegisterBufferUchar(
PUCHAR Register,
PUCHAR Buffer,
ULONG Count)
{
WRITE_REGISTER_BUFFER_UCHAR(Register, Buffer, Count);
}
ULONG
EISAWriteRegisterBufferUCHAR (
IN ULONG BusNumber,
IN ULONG Offset,
OUT PVOID Buffer,
IN ULONG Length
)
/*++
Routine Description:
This writes EISA memory space using byte reads.
Arguments:
BusNumber EISA bus number, starting with 0.
Offset Byte offset from the beginning of EISA space for
this bus.
This must be based off the .IoStart value in the
EISA adapter's ConfigurationData, which is held in
the Component Data Structure node. Therefore, this
will already have the EISA QVA bits set up.
Buffer A pointer to the data to be written to the EISA memory.
Length Number of bytes to write.
Return Value:
This returns the number of bytes actually written. If this is not
equal to the Length argument, an error has occurred. Explicitly
detected errors are signalled by returning a value of 0.
--*/
{
//
// Check for illegal values for Jensen.
//
if (BusNumber != 0) {
return (0);
}
//
// Call HAL library function with QVA bit or'd in.
//
WRITE_REGISTER_BUFFER_UCHAR((PUCHAR)Offset, Buffer, Length);
return (Length);
}
NTSTATUS DispatchControl(PDEVICE_OBJECT fdo, PIRP Irp)
{ // DispatchControl
PAGED_CODE();
PDEVICE_EXTENSION pdx = (PDEVICE_EXTENSION) fdo->DeviceExtension;
NTSTATUS status;
ULONG info = 0;
PIO_STACK_LOCATION stack = IoGetCurrentIrpStackLocation(Irp);
ULONG cbin = stack->Parameters.DeviceIoControl.InputBufferLength;
ULONG cbout = stack->Parameters.DeviceIoControl.OutputBufferLength;
ULONG code = stack->Parameters.DeviceIoControl.IoControlCode;
switch (code)
{ // process request
case IOCTL_READ_BASE_BAR0:
{
ULONG offset = *(ULONG*)(Irp->AssociatedIrp.SystemBuffer);
PUCHAR buff = (PUCHAR)ExAllocatePool(NonPagedPool,cbout);
READ_REGISTER_BUFFER_UCHAR((PUCHAR)pdx->MemBar0+offset,buff,cbout);
RtlCopyMemory(Irp->AssociatedIrp.SystemBuffer, buff, cbout);
ExFreePool(buff);
info = cbout;
break;
}
case IOCTL_WRITE_BASE_BAR0:
{
int* tempPointer = (int*)Irp->AssociatedIrp.SystemBuffer;
ULONG offset = *(ULONG*)(tempPointer);
tempPointer++;
PUCHAR buff = *(PUCHAR*)(tempPointer);
tempPointer++;
ULONG nInputNumber = *(ULONG*)(tempPointer);
WRITE_REGISTER_BUFFER_UCHAR((PUCHAR)pdx->MemBar0+offset,buff,nInputNumber);
break;
}
case IOCTL_READ_BASE_BAR2:
{
ULONG offset = *(ULONG*)(Irp->AssociatedIrp.SystemBuffer);
PUCHAR buff = (PUCHAR)ExAllocatePool(NonPagedPool,cbout);
READ_PORT_BUFFER_UCHAR(pdx->portbase+offset,buff,cbout);
RtlCopyMemory(Irp->AssociatedIrp.SystemBuffer, buff, cbout);
ExFreePool(buff);
info = cbout;
break;
}
case IOCTL_WRITE_BASE_BAR2:
{
int* tempPointer = (int*)Irp->AssociatedIrp.SystemBuffer;
ULONG offset = *(ULONG*)(tempPointer);
tempPointer++;
PUCHAR buff = *(PUCHAR*)(tempPointer);
tempPointer++;
ULONG nInputNumber = *(ULONG*)(tempPointer);
WRITE_PORT_BUFFER_UCHAR(pdx->portbase+offset,buff,nInputNumber);
break;
}
case IOCTL_READ_IMAGE:
{
PUCHAR buff = (PUCHAR)ExAllocatePool(NonPagedPool,cbout);
READ_REGISTER_BUFFER_UCHAR((PUCHAR)pdx->MemForImage,buff,cbout);
RtlCopyMemory(Irp->AssociatedIrp.SystemBuffer, buff, cbout);
ExFreePool(buff);
info = cbout;
break;
}
case IOCTL_WRITE_IMAGE:
{
PUCHAR buff = (PUCHAR)ExAllocatePool(NonPagedPool,cbin);
RtlCopyMemory(buff,Irp->AssociatedIrp.SystemBuffer,cbin);
WRITE_REGISTER_BUFFER_UCHAR((PUCHAR)pdx->MemForImage,buff,cbin);
ExFreePool(buff);
info = cbin;
break;
}
case IOCTL_ENABLE_INT:
{
//允许中断
UCHAR HSR = READ_PORT_UCHAR(pdx->portbase);
HSR = HSR & 0xFB;
WRITE_PORT_UCHAR(pdx->portbase,HSR);
break;
}
case IOCTL_DISABLE_INT:
{
//关中断
UCHAR HSR = READ_PORT_UCHAR(pdx->portbase);
HSR = HSR | 0x4;
WRITE_PORT_UCHAR(pdx->portbase,HSR);
break;
}
default:
status = STATUS_INVALID_DEVICE_REQUEST;
break;
} // process request
return CompleteRequest(Irp, status, info);
}
NTSTATUS InitMyPCI(IN PDEVICE_EXTENSION pdx,IN PCM_PARTIAL_RESOURCE_LIST list)
{
PDEVICE_OBJECT fdo = pdx->fdo;
ULONG vector;
KIRQL irql;
KINTERRUPT_MODE mode;
KAFFINITY affinity;
BOOLEAN irqshare;
BOOLEAN gotinterrupt = FALSE;
PHYSICAL_ADDRESS portbase;
BOOLEAN gotport = FALSE;
PCM_PARTIAL_RESOURCE_DESCRIPTOR resource = &list->PartialDescriptors[0];
ULONG nres = list->Count;
BOOLEAN IsMem0 = TRUE;
for (ULONG i = 0; i < nres; ++i, ++resource)
{ // for each resource
switch (resource->Type)
{ // switch on resource type
case CmResourceTypePort:
portbase = resource->u.Port.Start;
pdx->nports = resource->u.Port.Length;
pdx->mappedport = (resource->Flags & CM_RESOURCE_PORT_IO) == 0;
gotport = TRUE;
break;
case CmResourceTypeMemory:
if (IsMem0)
{
pdx->MemBar0 = (PUCHAR)MmMapIoSpace(resource->u.Memory.Start,
resource->u.Memory.Length,
MmNonCached);
pdx->nMem0 = resource->u.Memory.Length;
IsMem0 = FALSE;
}else
{
pdx->MemBar1 = (PUCHAR)MmMapIoSpace(resource->u.Memory.Start,
resource->u.Memory.Length,
MmNonCached);
pdx->nMem1 = resource->u.Memory.Length;
}
break;
case CmResourceTypeInterrupt:
irql = (KIRQL) resource->u.Interrupt.Level;
vector = resource->u.Interrupt.Vector;
affinity = resource->u.Interrupt.Affinity;
mode = (resource->Flags == CM_RESOURCE_INTERRUPT_LATCHED)
? Latched : LevelSensitive;
irqshare = resource->ShareDisposition == CmResourceShareShared;
gotinterrupt = TRUE;
break;
default:
KdPrint(("Unexpected I/O resource type %d\n", resource->Type));
break;
} // switch on resource type
} // for each resource
if (!(TRUE&& gotport&& gotinterrupt ))
{
KdPrint((" Didn't get expected I/O resources\n"));
return STATUS_DEVICE_CONFIGURATION_ERROR;
}
if (pdx->mappedport)
{ // map port address for RISC platform
pdx->portbase = (PUCHAR) MmMapIoSpace(portbase, pdx->nports, MmNonCached);
if (!pdx->mappedport)
{
KdPrint(("Unable to map port range %I64X, length %X\n", portbase, pdx->nports));
return STATUS_INSUFFICIENT_RESOURCES;
}
} // map port address for RISC platform
else
pdx->portbase = (PUCHAR) portbase.QuadPart;
NTSTATUS status = IoConnectInterrupt(&pdx->InterruptObject, (PKSERVICE_ROUTINE) OnInterrupt,
(PVOID) pdx, NULL, vector, irql, irql, LevelSensitive, TRUE, affinity, FALSE);
if (!NT_SUCCESS(status))
{
KdPrint(("IoConnectInterrupt failed - %X\n", status));
if (pdx->portbase && pdx->mappedport)
MmUnmapIoSpace(pdx->portbase, pdx->nports);
pdx->portbase = NULL;
return status;
}
#define IMAGE_LENGTH (640*480)
//申请一段连续物理地址来读取图像
PHYSICAL_ADDRESS maxAddress;
maxAddress.u.LowPart = 0xFFFFFFFF;
maxAddress.u.HighPart = 0;
pdx->MemForImage = MmAllocateContiguousMemory(IMAGE_LENGTH,maxAddress);
PHYSICAL_ADDRESS pycialAddressForImage = MmGetPhysicalAddress(pdx->MemForImage);
WRITE_REGISTER_BUFFER_UCHAR((PUCHAR)pdx->MemBar0+0x10000,
(PUCHAR)&pycialAddressForImage.u.LowPart,4);
return STATUS_SUCCESS;
}
