rtx
gen_rtx_fmt_s00 (RTX_CODE code, enum machine_mode mode,
const char *arg0)
{
rtx rt;
rt = rtx_alloc (code);
PUT_MODE (rt, mode);
XSTR (rt, 0) = arg0;
X0EXP (rt, 1) = NULL_RTX;
X0EXP (rt, 2) = NULL_RTX;
return rt;
}
rtx
gen_rtx_fmt_i00 (RTX_CODE code, enum machine_mode mode,
int arg0)
{
rtx rt;
rt = rtx_alloc (code);
PUT_MODE (rt, mode);
XINT (rt, 0) = arg0;
X0EXP (rt, 1) = NULL_RTX;
X0EXP (rt, 2) = NULL_RTX;
return rt;
}
rtx
gen_rtx_fmt_iuuBieiee0 (RTX_CODE code, enum machine_mode mode,
int arg0,
rtx arg1,
rtx arg2,
struct basic_block_def *arg3,
int arg4,
rtx arg5,
int arg6,
rtx arg7,
rtx arg8)
{
rtx rt;
rt = rtx_alloc (code);
PUT_MODE (rt, mode);
XINT (rt, 0) = arg0;
XEXP (rt, 1) = arg1;
XEXP (rt, 2) = arg2;
XBBDEF (rt, 3) = arg3;
XINT (rt, 4) = arg4;
XEXP (rt, 5) = arg5;
XINT (rt, 6) = arg6;
XEXP (rt, 7) = arg7;
XEXP (rt, 8) = arg8;
X0EXP (rt, 9) = NULL_RTX;
return rt;
}
rtx
gen_rtx_fmt_0 (RTX_CODE code, enum machine_mode mode)
{
rtx rt;
rt = rtx_alloc (code);
PUT_MODE (rt, mode);
X0EXP (rt, 0) = NULL_RTX;
return rt;
}
rtx
gen_rtx_fmt_iuu00000_stat (RTX_CODE code, enum machine_mode mode,
int arg0,
rtx arg1,
rtx arg2 MEM_STAT_DECL)
{
rtx rt;
rt = rtx_alloc_stat (code PASS_MEM_STAT);
PUT_MODE (rt, mode);
XINT (rt, 0) = arg0;
XEXP (rt, 1) = arg1;
XEXP (rt, 2) = arg2;
X0EXP (rt, 3) = NULL_RTX;
X0EXP (rt, 4) = NULL_RTX;
X0EXP (rt, 5) = NULL_RTX;
X0EXP (rt, 6) = NULL_RTX;
X0EXP (rt, 7) = NULL_RTX;
return rt;
}
rtx
gen_rtx_fmt_iuuB00is (RTX_CODE code, enum machine_mode mode,
int arg0,
rtx arg1,
rtx arg2,
struct basic_block_def *arg3,
int arg4,
const char *arg5)
{
rtx rt;
rt = rtx_alloc (code);
PUT_MODE (rt, mode);
XINT (rt, 0) = arg0;
XEXP (rt, 1) = arg1;
XEXP (rt, 2) = arg2;
XBBDEF (rt, 3) = arg3;
X0EXP (rt, 4) = NULL_RTX;
X0EXP (rt, 5) = NULL_RTX;
XINT (rt, 6) = arg4;
XSTR (rt, 7) = arg5;
return rt;
}
rtx
gen_rtx_fmt_eEee0 (RTX_CODE code, enum machine_mode mode,
rtx arg0,
rtvec arg1,
rtx arg2,
rtx arg3)
{
rtx rt;
rt = rtx_alloc (code);
PUT_MODE (rt, mode);
XEXP (rt, 0) = arg0;
XVEC (rt, 1) = arg1;
XEXP (rt, 2) = arg2;
XEXP (rt, 3) = arg3;
X0EXP (rt, 4) = NULL_RTX;
return rt;
}
rtx
gen_rtx_fmt_iuu000000 (RTX_CODE code, enum machine_mode mode,
int arg0,
rtx arg1,
rtx arg2)
{
rtx rt;
rt = rtx_alloc (code);
PUT_MODE (rt, mode);
XINT (rt, 0) = arg0;
XEXP (rt, 1) = arg1;
XEXP (rt, 2) = arg2;
X0EXP (rt, 3) = NULL_RTX;
X0EXP (rt, 4) = NULL_RTX;
X0EXP (rt, 5) = NULL_RTX;
X0EXP (rt, 6) = NULL_RTX;
X0EXP (rt, 7) = NULL_RTX;
X0EXP (rt, 8) = NULL_RTX;
return rt;
}
