int XDcfg_TransferBitfile(XDcfg *Instance, u32 StartAddress, u32 WordLength)
{
int Status;
volatile u32 IntrStsReg = 0;
// TODO : not working although suggested procedure per TRM
// Disable AXI Interface and Output Level Shifters (Input Level Shifters are still enabled)
// Xil_Out32(SLCR_UNLOCK, SLCR_UNLOCK_VAL);
// Xil_Out32(FPGA_RST_CTRL, 0xFFFFFFFF);
// Xil_Out32(LVL_SHFTR_EN, 0xA);
// Xil_Out32(SLCR_LOCK, SLCR_LOCK_VAL);
// Clear DMA and PCAP Done Interrupts
XDcfg_IntrClear(Instance, (XDCFG_IXR_DMA_DONE_MASK | XDCFG_IXR_D_P_DONE_MASK));
// Transfer bitstream from DDR into fabric in non secure mode
Status = XDcfg_Transfer(Instance, (u32 *) StartAddress, WordLength, (u32 *) XDCFG_DMA_INVALID_ADDRESS, 0, XDCFG_NON_SECURE_PCAP_WRITE);
if (Status != XST_SUCCESS)
return Status;
// Poll DMA Done Interrupt
while ((IntrStsReg & XDCFG_IXR_DMA_DONE_MASK) != XDCFG_IXR_DMA_DONE_MASK)
IntrStsReg = XDcfg_IntrGetStatus(Instance);
// Poll PCAP Done Interrupt
while ((IntrStsReg & XDCFG_IXR_D_P_DONE_MASK) != XDCFG_IXR_D_P_DONE_MASK)
IntrStsReg = XDcfg_IntrGetStatus(Instance);
// Enable AXI Interface and Input/Output Level Shifters
// Xil_Out32(SLCR_UNLOCK, SLCR_UNLOCK_VAL);
// Xil_Out32(LVL_SHFTR_EN, 0xF);
// Xil_Out32(FPGA_RST_CTRL, 0x0);
// Xil_Out32(SLCR_LOCK, SLCR_LOCK_VAL);
return XST_SUCCESS;
}
/**
*
* This function loads PL partition using PCAP
*
* @param SourceDataPtr is a pointer to where the data is read from
* @param DestinationDataPtr is a pointer to where the data is written to
* @param SourceLength is the length of the data to be moved in words
* @param DestinationLength is the length of the data to be moved in words
* @param SecureTransfer indicated the encryption key location, 0 for
* non-encrypted
*
* @return
* - XST_SUCCESS if the transfer is successful
* - XST_FAILURE if the transfer fails
*
* @note None
*
****************************************************************************/
u32 PcapLoadPartition(u32 *SourceDataPtr, u32 *DestinationDataPtr,
u32 SourceLength, u32 DestinationLength, u32 SecureTransfer)
{
u32 Status;
u32 IntrStsReg;
u32 PcapTransferType = XDCFG_NON_SECURE_PCAP_WRITE;
/*
* Check for secure transfer
*/
if (SecureTransfer) {
PcapTransferType = XDCFG_SECURE_PCAP_WRITE;
}
#ifdef FSBL_PERF
XTime tXferCur = 0;
FsblGetGlobalTime(&tXferCur);
#endif
/*
* Clear the PCAP status registers
*/
Status = ClearPcapStatus();
if (Status != XST_SUCCESS) {
fsbl_printf(DEBUG_INFO,"PCAP_CLEAR_STATUS_FAIL \r\n");
return XST_FAILURE;
}
/*
* For Bitstream case destination address will be 0xFFFFFFFF
*/
DestinationDataPtr = (u32*)XDCFG_DMA_INVALID_ADDRESS;
/*
* New Bitstream download initialization sequence
*/
FabricInit();
#ifdef XPAR_XWDTPS_0_BASEADDR
/*
* Prevent WDT reset
*/
XWdtPs_RestartWdt(&Watchdog);
#endif
/*
* PCAP single DMA transfer setup
*/
SourceDataPtr = (u32*)((u32)SourceDataPtr | PCAP_LAST_TRANSFER);
DestinationDataPtr = (u32*)((u32)DestinationDataPtr | PCAP_LAST_TRANSFER);
/*
* Transfer using Device Configuration
*/
Status = XDcfg_Transfer(DcfgInstPtr, (u8 *)SourceDataPtr,
SourceLength,
(u8 *)DestinationDataPtr,
DestinationLength, PcapTransferType);
if (Status != XST_SUCCESS) {
fsbl_printf(DEBUG_INFO,"Status of XDcfg_Transfer = %d \r \n",Status);
return XST_FAILURE;
}
/*
* Dump the PCAP registers
*/
PcapDumpRegisters();
/*
* Poll for the DMA done
*/
Status = XDcfgPollDone(XDCFG_IXR_DMA_DONE_MASK, MAX_COUNT);
if (Status != XST_SUCCESS) {
fsbl_printf(DEBUG_INFO,"PCAP_DMA_DONE_FAIL \r\n");
return XST_FAILURE;
}
fsbl_printf(DEBUG_INFO,"DMA Done ! \n\r");
/*
* Poll for FPGA Done
*/
Status = XDcfgPollDone(XDCFG_IXR_PCFG_DONE_MASK, MAX_COUNT);
if (Status != XST_SUCCESS) {
fsbl_printf(DEBUG_INFO,"PCAP_FPGA_DONE_FAIL\r\n");
return XST_FAILURE;
}
fsbl_printf(DEBUG_INFO,"FPGA Done ! \n\r");
/*
* Check for errors
*/
IntrStsReg = XDcfg_IntrGetStatus(DcfgInstPtr);
if (IntrStsReg & FSBL_XDCFG_IXR_ERROR_FLAGS_MASK) {
fsbl_printf(DEBUG_INFO,"Errors in PCAP \r\n");
return XST_FAILURE;
}
/*
* For Performance measurement
*/
#ifdef FSBL_PERF
XTime tXferEnd = 0;
fsbl_printf(DEBUG_GENERAL,"Time taken is ");
FsblMeasurePerfTime(tXferCur,tXferEnd);
#endif
return XST_SUCCESS;
}
