/* Channel initialization function */
void SPI_CONFIG_0_lInit()
{
/* Initialize USIC channel in SPI mode */
XMC_SPI_CH_Init(XMC_SPI0_CH1, &SPI_CONFIG_0_channel_config);
/* Set the frame and word length */
XMC_SPI_CH_SetFrameLength(XMC_SPI0_CH1, 16U);
XMC_SPI_CH_SetWordLength(XMC_SPI0_CH1, 16U);
/* Set MSB data shift direction */
XMC_SPI_CH_SetBitOrderMsbFirst(XMC_SPI0_CH1);
/* Set input source for input stage dx0 (receive pin) */
XMC_SPI_CH_SetInputSource(XMC_SPI0_CH1, XMC_SPI_CH_INPUT_DIN0, 0U);
/* Set input source for input stage dx3 (receive pin) */
XMC_SPI_CH_SetInputSource(XMC_SPI0_CH1, XMC_SPI_CH_INPUT_DIN1, 0U);
/* Set input source for input stage dx4 (receive pin) */
XMC_SPI_CH_SetInputSource(XMC_SPI0_CH1, XMC_SPI_CH_INPUT_DIN2, 0U);
/* Set input source for input stage dx5 (receive pin) */
XMC_SPI_CH_SetInputSource(XMC_SPI0_CH1, XMC_SPI_CH_INPUT_DIN3, 0U);
/* Disable Frame End Mode */
XMC_SPI_CH_DisableFEM(XMC_SPI0_CH1);
/* Configure the clock polarity and clock delay */
XMC_SPI_CH_ConfigureShiftClockOutput(XMC_SPI0_CH1, XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_1_DELAY_ENABLED,
XMC_SPI_CH_BRG_SHIFT_CLOCK_OUTPUT_SCLK);
/* Disable all Slave Select lines */
XMC_SPI_CH_DisableSlaveSelect(XMC_SPI0_CH1);
/* Establish Slave Select signal polarity */
XMC_SPI_CH_SetSlaveSelectPolarity(XMC_SPI0_CH1, XMC_SPI_CH_SLAVE_SEL_INV_TO_MSLS);
/* Set Select Control */;
XMC_SPI_CH_DisableSlaveSelectCodedMode(XMC_SPI0_CH1);
/* Configure the leading/trailing delay for the MSLS signal */
XMC_SPI_CH_SetSlaveSelectDelay(XMC_SPI0_CH1, 2U);
/* Set the service request line for the Data Lost, Baud Rate Generator and SPI protocol events */
XMC_USIC_CH_SetInterruptNodePointer(XMC_SPI0_CH1, XMC_USIC_CH_INTERRUPT_NODE_POINTER_PROTOCOL, 0U);
/* Enable the Slave Select 0 Signal */
XMC_SPI_CH_EnableSlaveSelect(XMC_SPI0_CH1, SPI_CONFIG_0_slave_select_list[0]);
}
/*Channel initialization function*/
UART_STATUS_t UART_0_init()
{
UART_STATUS_t status = UART_STATUS_SUCCESS;
status = (UART_STATUS_t)GLOBAL_DMA_Init(&GLOBAL_DMA_0);
XMC_DMA_CH_Init(XMC_DMA0, 5U, &UART_0_tx_dma_ch_config);
XMC_DMA_CH_EnableEvent(XMC_DMA0, 5U, XMC_DMA_CH_EVENT_TRANSFER_COMPLETE);
XMC_DMA_CH_Init(XMC_DMA0, 4U, &UART_0_rx_dma_ch_config);
XMC_DMA_CH_EnableEvent(XMC_DMA0, 4U, XMC_DMA_CH_EVENT_TRANSFER_COMPLETE);
/*Configure Receive pin*/
XMC_GPIO_Init((XMC_GPIO_PORT_t *)RX_PIN_PORT_BASE, 4U, &UART_0_rx_pin_config);
/* Initialize USIC channel in UART mode*/
XMC_UART_CH_Init(SELECTED_UART_CHANNEL, &UART_0_channel_config);
/*Set input source path*/
XMC_USIC_CH_SetInputSource(SELECTED_UART_CHANNEL, XMC_USIC_CH_INPUT_DX0, SOURCE_INPUT_SELECT);
/* Start UART */
XMC_UART_CH_Start(SELECTED_UART_CHANNEL);
/* Initialize UART TX pin */
XMC_GPIO_Init((XMC_GPIO_PORT_t *)TX_PIN_PORT_BASE, 5U, &UART_0_tx_pin_config);
/*Set service request for transmit interrupt*/
XMC_USIC_CH_SetInterruptNodePointer(SELECTED_UART_CHANNEL, XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER,
0U);
/*Set service request for receive interrupt*/
XMC_USIC_CH_SetInterruptNodePointer(SELECTED_UART_CHANNEL, XMC_USIC_CH_INTERRUPT_NODE_POINTER_RECEIVE,
1U);
XMC_USIC_CH_SetInterruptNodePointer(SELECTED_UART_CHANNEL, XMC_USIC_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE,
1U);
/*Set service request for UART protocol events*/
XMC_USIC_CH_SetInterruptNodePointer(SELECTED_UART_CHANNEL, XMC_USIC_CH_INTERRUPT_NODE_POINTER_PROTOCOL,
2U);
/*Register transfer complete event handler*/
XMC_DMA_CH_SetEventHandler(XMC_DMA0, 4U, UART_0_dma_rx_handler);
/*Register transfer complete event handler*/
XMC_DMA_CH_SetEventHandler(XMC_DMA0, 5U, UART_0_dma_tx_handler);
/* make DMA ready for transmission*/
XMC_USIC_CH_TriggerServiceRequest(SELECTED_UART_CHANNEL, 0U);
return status;
}
/*Channel initialization function*/
UART_STATUS_t TempUart_init()
{
UART_STATUS_t status = UART_STATUS_SUCCESS;
/*Configure Receive pin*/
XMC_GPIO_Init((XMC_GPIO_PORT_t *)PORT5_BASE, 0U, &TempUart_rx_pin_config);
/* Initialize USIC channel in UART mode*/
XMC_UART_CH_Init(XMC_UART0_CH0, &TempUart_channel_config);
/*Set input source path*/
XMC_USIC_CH_SetInputSource(XMC_UART0_CH0, XMC_USIC_CH_INPUT_DX0, 3U);
/* Start UART */
XMC_UART_CH_Start(XMC_UART0_CH0);
/* Initialize UART TX pin */
XMC_GPIO_Init((XMC_GPIO_PORT_t *)PORT5_BASE, 1U, &TempUart_tx_pin_config);
/*Set service request for transmit interrupt*/
XMC_USIC_CH_SetInterruptNodePointer(XMC_UART0_CH0, XMC_USIC_CH_INTERRUPT_NODE_POINTER_TRANSMIT_BUFFER,
3U);
/*Set service request for receive interrupt*/
XMC_USIC_CH_SetInterruptNodePointer(XMC_UART0_CH0, XMC_USIC_CH_INTERRUPT_NODE_POINTER_RECEIVE,
5U);
XMC_USIC_CH_SetInterruptNodePointer(XMC_UART0_CH0, XMC_USIC_CH_INTERRUPT_NODE_POINTER_ALTERNATE_RECEIVE,
5U);
/*Set service request for UART protocol events*/
XMC_USIC_CH_SetInterruptNodePointer(XMC_UART0_CH0, XMC_USIC_CH_INTERRUPT_NODE_POINTER_PROTOCOL,
0U);
/*Set priority and enable NVIC node for transmit interrupt*/
NVIC_SetPriority((IRQn_Type)87, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),
18U, 0U));
NVIC_EnableIRQ((IRQn_Type)87);
/*Set priority and enable NVIC node for receive interrupt*/
NVIC_SetPriority((IRQn_Type)89, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),
18U, 0U));
NVIC_EnableIRQ((IRQn_Type)89);
return status;
}
