/*
* Hardware initialisation to generate the RTOS tick.
*/
static void prvSetupTimerInterrupt( void )
{
const uint32_t ulInterval = ( ( configCPU_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL );
XTime_DECClearInterrupt();
XTime_FITClearInterrupt();
XTime_WDTClearInterrupt();
XTime_WDTDisableInterrupt();
XTime_FITDisableInterrupt();
XExc_RegisterHandler( XEXC_ID_DEC_INT, ( XExceptionHandler ) vPortTickISR, ( void * ) 0 );
XTime_DECEnableAutoReload();
XTime_DECSetInterval( ulInterval );
XTime_DECEnableInterrupt();
}
//--------------------------------------------------------------------
// PowerPC Timer Initialization functions.
// For PowerPC, DEC and opb_timer can be used for Profiling. This
// is selected by the user in standalone BSP
//
//--------------------------------------------------------------------
int powerpc405_init(void)
{
Xil_ExceptionInit();
Xil_ExceptionDisableMask( XIL_EXCEPTION_NON_CRITICAL ) ;
// Initialize the Timer.
// 1. If PowerPC DEC Timer has to be used, initialize DEC timer.
// 2. Else use opb_timer. It can be directly connected or thru intc to PowerPC
#ifdef PPC_PIT_INTERRUPT
ppc_dec_init();
#else
#ifdef TIMER_CONNECT_INTC
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_NON_CRITICAL_INT,
(Xil_ExceptionHandler)XIntc_DeviceInterruptHandler,(void *)0);
XIntc_RegisterHandler( INTC_BASEADDR, PROFILE_TIMER_INTR_ID,
(XInterruptHandler)profile_intr_handler,(void*)0);
#else
Xil_ExceptionRegisterHandler( XIL_EXCEPTION_ID_NON_CRITICAL_INT,
(Xil_ExceptionHandler)profile_intr_handler,(void *)0);
Xil_ExceptionRegisterHandler( XIL_EXCEPTION_ID_NON_CRITICAL_INT,
(Xil_ExceptionHandler)profile_intr_handler,(void *)0);
#endif
// Initialize the timer with Timer Ticks
opb_timer_init() ;
#endif
// Enable Interrupts in the System, if Profile Timer is the only Interrupt
// in the System.
#ifdef ENABLE_SYS_INTR
#ifdef PPC_PIT_INTERRUPT
XTime_DECEnableInterrupt() ;
#elif TIMER_CONNECT_INTC
XIntc_MasterEnable( INTC_BASEADDR );
XIntc_SetIntrSvcOption( INTC_BASEADDR, XIN_SVC_ALL_ISRS_OPTION);
XIntc_EnableIntr( INTC_BASEADDR, PROFILE_TIMER_INTR_MASK );
#endif
Xil_ExceptionEnableMask( XEXC_NON_CRITICAL ) ;
#endif
return 0;
}
void
platform_setup_timer()
{
#ifdef XPAR_CPU_PPC440_CORE_CLOCK_FREQ_HZ
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_DEC_INT,
(XExceptionHandler)xadapter_timer_handler, NULL);
/* Set DEC to interrupt every 250 mseconds */
XTime_DECSetInterval(PIT_INTERVAL);
XTime_TSRClearStatusBits(XREG_TSR_CLEAR_ALL);
XTime_DECEnableAutoReload();
XTime_DECEnableInterrupt();
#else
Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_PIT_INT,
(XExceptionHandler)xadapter_timer_handler, NULL);
/* Set PIT to interrupt every 250 mseconds */
XTime_PITSetInterval(PIT_INTERVAL);
XTime_TSRClearStatusBits(XREG_TSR_CLEAR_ALL);
XTime_PITEnableAutoReload();
XTime_PITEnableInterrupt();
#endif
}
