Esempi in C++ (Cpp) per _CPU_ISR_install_vector

Esempio n. 1

File: irq.c Progetto: 0871087123/rtems

rtems_status_code bsp_interrupt_facility_initialize(void)
{
  volatile uint32_t *ctrl = (volatile uint32_t *) VICVectCntlBase;
  size_t i = 0;

  /* Disable all interrupts */
  VICIntEnClr = 0xffffffff;

  /* Use IRQ category */
  VICIntSelect = 0;

  /* Enable access in USER mode */
  VICProtection = 0;

  for (i = 0; i < 16; ++i) {
    /* Disable vector mode */
    ctrl [i] = 0;

    /* Acknowledge interrupts for all priorities */
    VICVectAddr = 0;
  }

  /* Acknowledge interrupts for all priorities */
  VICVectAddr = 0;

  /* Install the IRQ exception handler */
  _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);

  return RTEMS_SUCCESSFUL;
}

Esempio n. 2

File: clockdrv.c Progetto: gedare/rtems

static void riscv_generic_clock_handler_install(proc_ptr new_isr)
{
  rtems_status_code sc = RTEMS_SUCCESSFUL;
  _CPU_ISR_install_vector(RISCV_MACHINE_TIMER_INTERRUPT,
                          new_isr,
                          NULL);

  if (sc != RTEMS_SUCCESSFUL) {
    rtems_fatal_error_occurred(0xdeadbeef);
  }
}

Esempio n. 3

File: arm_exc_handler_high.c Progetto: epicsdeb/rtems

/* FIXME: put comments here */
void rtems_exception_init_mngt(void)
{
        ISR_Level level;

      _CPU_ISR_Disable(level);
      _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF,
                              _Exception_Handler_Undef_Swi,
                              NULL);

      _CPU_ISR_install_vector(ARM_EXCEPTION_SWI,
                              _Exception_Handler_Undef_Swi,
                              NULL);

      _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT,
                              _Exception_Handler_Abort,
                              NULL);

      _CPU_ISR_install_vector(ARM_EXCEPTION_DATA_ABORT,
                              _exc_data_abort,
                              NULL);

      _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ,
                              _Exception_Handler_Abort,
                              NULL);

      _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ,
                              _Exception_Handler_Abort,
                              NULL);

      _CPU_ISR_Enable(level);
}

Esempio n. 4

File: irq.c Progetto: grunzasr/bsp_for_rtems

rtems_status_code bsp_interrupt_facility_initialize(void)
{
    /* disable all interrupts */
    XSCALE_INT_ICMR = 0x0;

    /* Direct the interrupt to IRQ*/
    XSCALE_INT_ICLR = 0x0;

    /* Install the IRQ exception handler */
    _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);

    return RTEMS_SUCCESSFUL;
}

Esempio n. 5

File: clockdrv.c Progetto: ragunath3252/rtems

static void generic_or1k_clock_handler_install(
    proc_ptr new_isr,
    proc_ptr old_isr
)
{
    rtems_status_code sc = RTEMS_SUCCESSFUL;
    old_isr = NULL;
    _CPU_ISR_install_vector(OR1K_EXCEPTION_TICK_TIMER,
                            new_isr,
                            old_isr);

    if (sc != RTEMS_SUCCESSFUL) {
        rtems_fatal_error_occurred(0xdeadbeef);
    }
}

Esempio n. 6

File: irq.c Progetto: rtemss/rtems

rtems_status_code bsp_interrupt_facility_initialize(void)
{
  unsigned long i = 0;

  for (i = 0; i < 32; ++i) {
    AIC_SVR_REG(i<<2) = i;
  }

  /* disable all interrupts */
  AIC_CTL_REG(AIC_IDCR) = 0xffffffff;

  _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);

  return RTEMS_SUCCESSFUL;
}

Esempio n. 7

File: irq.c Progetto: epicsdeb/rtems

rtems_status_code bsp_interrupt_facility_initialize(void)
{
  uint32_t int_stat = 0;

  /* mask all interrupts */
  *EP7312_INTMR1 = 0x0;
  *EP7312_INTMR2 = 0x0;
  *EP7312_INTMR3 = 0x0;
  
  /* clear all pending interrupt status' */
  int_stat = *EP7312_INTSR1;
  if(int_stat & EP7312_INTR1_EXTFIQ)
  {
  }
  if(int_stat & EP7312_INTR1_BLINT)
  {
      *EP7312_BLEOI = 0xFFFFFFFF;
  }
  if(int_stat & EP7312_INTR1_WEINT)
  {
      *EP7312_TEOI = 0xFFFFFFFF;
  }
  if(int_stat & EP7312_INTR1_MCINT)
  {
  }
  if(int_stat & EP7312_INTR1_CSINT)
  {
      *EP7312_COEOI = 0xFFFFFFFF;
  }
  if(int_stat & EP7312_INTR1_EINT1)
  {
  }
  if(int_stat & EP7312_INTR1_EINT2)
  {
  }
  if(int_stat & EP7312_INTR1_EINT3)
  {
  }
  if(int_stat & EP7312_INTR1_TC1OI)
  {
      *EP7312_TC1EOI = 0xFFFFFFFF;
  }
  if(int_stat & EP7312_INTR1_TC2OI)
  {
      *EP7312_TC2EOI = 0xFFFFFFFF;
  }
  if(int_stat & EP7312_INTR1_RTCMI)
  {
      *EP7312_RTCEOI = 0xFFFFFFFF;
  }
  if(int_stat & EP7312_INTR1_TINT)
  {
      *EP7312_TEOI = 0xFFFFFFFF;
  }
  if(int_stat & EP7312_INTR1_URXINT1)
  {
  }
  if(int_stat & EP7312_INTR1_UTXINT1)
  {
  }
  if(int_stat & EP7312_INTR1_UMSINT)
  {
      *EP7312_UMSEOI = 0xFFFFFFFF;
  }
  if(int_stat & EP7312_INTR1_SSEOTI)
  {
      *EP7312_SYNCIO;
  }
  int_stat = *EP7312_INTSR1;
  
  int_stat = *EP7312_INTSR2;
  if(int_stat & EP7312_INTR2_KBDINT)
  {
      *EP7312_KBDEOI = 0xFFFFFFFF;
  }
  if(int_stat & EP7312_INTR2_SS2RX)
  {
  }
  if(int_stat & EP7312_INTR2_SS2TX)
  {
  }
  if(int_stat & EP7312_INTR2_URXINT2)
  {
  }
  if(int_stat & EP7312_INTR2_UTXINT2)
  {
  }
  int_stat = *EP7312_INTSR2;
  
  int_stat = *EP7312_INTSR3;
  if(int_stat & EP7312_INTR2_DAIINT)
  {
  }
  int_stat = *EP7312_INTSR3;

  _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);

  return RTEMS_SUCCESSFUL;
}

Esempio n. 8

File: irq.c Progetto: AlexShiLucky/rtems

rtems_status_code bsp_interrupt_facility_initialize(void)
{
  _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _ARMV4_Exception_interrupt, NULL);

  return RTEMS_SUCCESSFUL;
}