void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
GPIO_InitTypeDef GPIO_InitStruct;
if(hspi->Instance==SPI5)
{
/* USER CODE BEGIN SPI5_MspInit 0 */
/* USER CODE END SPI5_MspInit 0 */
/* Peripheral clock enable */
__SPI5_CLK_ENABLE();
/**SPI5 GPIO Configuration
PF7 ------> SPI5_SCK
PF8 ------> SPI5_MISO
PF9 ------> SPI5_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
/* USER CODE BEGIN SPI5_MspInit 1 */
/* USER CODE END SPI5_MspInit 1 */
}
}
void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
{
GPIO_InitTypeDef GPIO_InitStruct;
if(hspi->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspInit 0 */
/* USER CODE END SPI1_MspInit 0 */
/* Peripheral clock enable */
__SPI1_CLK_ENABLE();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PB4 ------> SPI1_MISO
PB5 ------> SPI1_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* USER CODE BEGIN SPI1_MspInit 1 */
/* USER CODE END SPI1_MspInit 1 */
}
else if(hspi->Instance==SPI4)
{
/* USER CODE BEGIN SPI4_MspInit 0 */
/* USER CODE END SPI4_MspInit 0 */
/* Peripheral clock enable */
__SPI4_CLK_ENABLE();
/**SPI4 GPIO Configuration
PE2 ------> SPI4_SCK
PE13 ------> SPI4_MISO
PE14 ------> SPI4_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_13|GPIO_PIN_14;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI4;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
/* USER CODE BEGIN SPI4_MspInit 1 */
/* USER CODE END SPI4_MspInit 1 */
}
else if(hspi->Instance==SPI5)
{
/* USER CODE BEGIN SPI5_MspInit 0 */
/* USER CODE END SPI5_MspInit 0 */
/* Peripheral clock enable */
__SPI5_CLK_ENABLE();
/**SPI5 GPIO Configuration
PF7 ------> SPI5_SCK
PF8 ------> SPI5_MISO
PF9 ------> SPI5_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
/* USER CODE BEGIN SPI5_MspInit 1 */
/* USER CODE END SPI5_MspInit 1 */
}
}
void SpiDma_Init(void)
{
/* DMA interrupt */
DMA2->HIFCR = 0xffffffff; /* Make sure all the IF are cleared */
HAL_NVIC_SetPriority(DMA2_Stream4_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(DMA2_Stream4_IRQn);
__DMA2_CLK_ENABLE();
__SPI5_CLK_ENABLE();
/* DMA2 configuration and intialization */
DMA2_Stream4->CR &= 0xf0100000;
while(DMA2_Stream4->CR & 1); /* Wait until DMA is disabled */
DMA2_Stream4->NDTR = COMPLETE_NDTR; /* Number of data transfers */
DMA2_Stream4->PAR = (uint32_t)(&(SPI5->DR));
#ifndef NO_SDRAM
DMA2_Stream4->M0AR = (uint32_t)(((uint8_t *)dcmi_buff)); /* DMA address registers */
DMA2_Stream4->M1AR = (uint32_t)(((uint8_t *)dcmi_buff));
#else
DMA2_Stream4->M0AR = (uint32_t)(&(dcmi_buff[0])); /* DMA address registers */
DMA2_Stream4->M1AR = (uint32_t)(&(dcmi_buff[0]));
#endif
DMA2_Stream4->CR |= /* Channel [0,7] */ 2<<25| \
/* Mburst */ 1<<23| \
/* Pburst */ 1<<21| \
/* Current target */ 0<<19| \
/* Double buffer */ 1<<18| \
/* Priority [0,3] */ 3<<16| \
/* Per inc offset (0= %Psize) */ 0<<15| \
/* Mem size */ 0<<13| \
/* Periph size (0b00=8bits) */ 0<<11| \
/* Memory increment */ 1<<10| \
/* Periph increment */ 0<< 9| \
/* Circular mode */ 1<< 8| \
/* Dir (0b01 == M2P) */ 1<< 6| \
/* Periph flow controller */ 0<< 5| \
/* Transfer complete IE */ 0<< 4| \
/* Half transfer IE */ 1<< 3| \
/* Transfer error IE */ 0<< 2| \
/* Direct mode error IE */ 0<< 1| \
/* Stream EN/Ready */ 0<< 0;
DMA2_Stream4->FCR |= /* FIFO error IE */ 0<< 7| \
/* Direct mode disable */ 0<< 2| \
/* FIFO thres (1/4)*(X+1)*/ 0<< 0;
DMA2_Stream4->CR |= 1; /* Enable */
while(!(DMA2_Stream4->CR & 1)); /* Wait until DMA is enabled */
/* SPI configuration and intialization */
SPI5->CR1 &= 0x0000; /* Clear all non-reserved bits */
SPI5->CR2 &= 0xff08;
while(SPI5->CR1 & 0x0040); /* Wait until peripheral is disabled */
SPI5->CR1 |= /* BIDIMODE */ 0<<15| \
/* BIDIOE */ 0<<14| \
/* CRCEN */ 0<<13| \
/* CRCNEXT */ 0<<12| \
/* Data frame 0=8b, 1=16b */ 0<<11| \
/* RX only */ 0<<10| \
/* Slave management */ 0<< 9| \
/* Slave select */ 0<< 8| \
/* LSBfirst */ 0<< 7| \
/* SPI enable */ 0<< 6| \
/* Baud rate control */ 0<< 3| \
/* Master selection */ 0<< 2| \
/* Clock polarity when idle */ 1<< 1| \
/* Clock phase */ 0<< 0;
SPI5->CR2 |= /* TXEIE */ 0<< 7| \
/* RXNEIE */ 0<< 6| \
/* Error interrupt enable */ 0<< 5| \
/* Frame format */ 0<< 4| \
/* SS output enable */ 0<< 2| \
/* TXDMAEN */ 1<< 1| \
/* RXDMAEN */ 0<< 0;
}
void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi)
{
GPIO_InitTypeDef GPIO_InitStruct;
if(hspi->Instance == SPI4) //Plan board, SPI Slave
{
//Enable GPIO clock
__GPIOE_CLK_ENABLE();
//Enable peripheral clock
__SPI4_CLK_ENABLE();
//SPI4 pins:
//=-=-=-=-=
//NSS4: PE4
//MOSI4: PE6
//MISO4: PE5
//SCK4: PE2
//All but NSS:
GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_5|GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI4;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
//It seems that NSS can't be used as a good CS => set as input, ISR on change
GPIO_InitStruct.Pin = GPIO_PIN_4;
GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
//Enable interrupts/NVIC for SPI data lines
HAL_NVIC_SetPriority(SPI4_IRQn, 0, 1);
HAL_NVIC_EnableIRQ(SPI4_IRQn);
//And for the the CS pin
HAL_NVIC_SetPriority(EXTI4_IRQn, EXT4_IRQ_CHANNEL, EXT4_IRQ_SUBCHANNEL);
HAL_NVIC_EnableIRQ(EXTI4_IRQn);
}
else if(hspi->Instance == SPI5) //FLASH, SPI Master
{
//Enable GPIO clock
__GPIOF_CLK_ENABLE();
//Enable peripheral clock
__SPI5_CLK_ENABLE();
//SPI5 pins:
//=-=-=-=-=
//NSS5: PF6
//MOSI5: PF9
//MISO5: PF8
//SCK5: PF7
//All but NSS:
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
//Enable interrupts/NVIC for SPI data lines
HAL_NVIC_SetPriority(SPI5_IRQn, 7, 7);
HAL_NVIC_EnableIRQ(SPI5_IRQn);
}
else if(hspi->Instance == SPI6) //Expansion connector, SPI Master
{
//Enable GPIO clock
__GPIOG_CLK_ENABLE();
//Enable peripheral clock
__SPI6_CLK_ENABLE();
//SPI6 pins:
//=-=-=-=-=
//NSS6: PG8
//MOSI6: PG14
//MISO6: PG12
//SCK6: PG13
//All but NSS:
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_12|GPIO_PIN_13|GPIO_PIN_14;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FAST;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI6;
HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
//Enable interrupts/NVIC for SPI data lines
HAL_NVIC_SetPriority(SPI6_IRQn, 7, 7);
HAL_NVIC_EnableIRQ(SPI6_IRQn);
}
else
{
//Trying to configure a port that doesn't exist, flag the error
flexsea_error(SE_INVALID_SPI);
}
}
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk)
{
// Determine the SPI to use
SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
SPIName instance = (SPIName)pinmap_merge(spi_data, spi_sclk);
MBED_ASSERT(instance != (SPIName)NC);
// Enable SPI clock and set the right module number
switch(instance) {
case SPI_1:
__SPI1_CLK_ENABLE();
obj->spi.module = 0;
break;
case SPI_2:
__SPI2_CLK_ENABLE();
obj->spi.module = 1;
break;
case SPI_3:
__SPI3_CLK_ENABLE();
obj->spi.module = 2;
break;
#if MODULES_SIZE_SPI > 3
case SPI_4:
__SPI4_CLK_ENABLE();
obj->spi.module = 3;
break;
#endif
#if MODULES_SIZE_SPI > 4
case SPI_5:
__SPI5_CLK_ENABLE();
obj->spi.module = 4;
break;
#endif
#if MODULES_SIZE_SPI > 5
case SPI_6:
__SPI6_CLK_ENABLE();
obj->spi.module = 5;
break;
#endif
default:
break;
}
// Configure the SPI pins
pinmap_pinout(mosi, PinMap_SPI_MOSI);
pinmap_pinout(miso, PinMap_SPI_MISO);
pinmap_pinout(sclk, PinMap_SPI_SCLK);
obj->spi.pin_miso = miso;
obj->spi.pin_mosi = mosi;
obj->spi.pin_sclk = sclk;
// initialize the handle for this master!
SPI_HandleTypeDef *handle = &SpiHandle[obj->spi.module];
handle->Instance = (SPI_TypeDef *)(instance);
handle->Init.Mode = SPI_MODE_MASTER;
handle->Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_256;
handle->Init.Direction = SPI_DIRECTION_2LINES;
handle->Init.CLKPhase = SPI_PHASE_1EDGE;
handle->Init.CLKPolarity = SPI_POLARITY_LOW;
handle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
handle->Init.CRCPolynomial = 7;
handle->Init.DataSize = SPI_DATASIZE_8BIT;
handle->Init.FirstBit = SPI_FIRSTBIT_MSB;
handle->Init.NSS = SPI_NSS_SOFT;
handle->Init.TIMode = SPI_TIMODE_DISABLED;
DEBUG_PRINTF("SPI%u: Init\n", obj->spi.module+1);
init_spi(obj);
}
