void gpio_init_cs8900(void)
{
__gpio_as_func0(60); //cs4
__gpio_as_func0(61); //cs4
__gpio_as_func0(62); //cs4
__gpio_as_irq_high_level(59); //irq
__gpio_disable_pull(59); //disable pull
REG_EMC_SMCR4 |= (1 << 6); //16bit
}
void gpio_init_cs8900(void)
{
#ifdef CONFIG_JzRISC
__gpio_as_func0(60); //cs4
__gpio_as_func0(61); //cs4
__gpio_as_func0(62); //cs4
__gpio_as_irq_high_level(59); //irq
__gpio_disable_pull(59); //disable pull
REG_EMC_SMCR4 |= (1 << 6); //16bit
#endif /* CONFIG_JzRISC */
}
/*
* I/O routines
*/
static void gpio_init_cs8900(void)
{
#ifdef CONFIG_SOC_JZ4740
__gpio_as_func0(60); //CS4#
__gpio_as_func0(61); //RD#
__gpio_as_func0(62); //WR#
__gpio_as_irq_high_level(59); //irq
__gpio_disable_pull(59); //disable pull
REG_EMC_SMCR4 |= (1 << 6); //16bit
#elif CONFIG_SOC_JZ4750
__gpio_as_func0(32*2+23); //CS3#
__gpio_as_func0(32*2+25); //RD#
__gpio_as_func0(32*2+26); //WR#
#ifdef CONFIG_JZ4750_FUWA
__gpio_as_irq_high_level(32*4+20); //irq
__gpio_disable_pull(32*4+20); //disable pull
#else
__gpio_as_irq_high_level(32*2 +6); //irq
__gpio_disable_pull(32*2 +6); //disable pull
#endif
REG_EMC_SMCR3 |= (1 << 6); //16bit
#endif
udelay(1);
}
int board_private_init(void)
{
unsigned int signature = 0;
/*add board privater gpio here ,it while be called by boot_main to nitialization*/
//for ethernet initialization
__gpio_as_nand_16bit(1);
__gpio_as_func0(CS_PIN);
__gpio_as_func0(RD_N_PIN);
__gpio_as_func0(WE_N_PIN);
__gpio_as_func0(32 * 1 + 2);
__gpio_as_func0(32 * 1 + 3);
REG_GPIO_PXFUNS(0) = 0x0000ffff;
REG_GPIO_PXTRGC(0) = 0x0000ffff;
REG_GPIO_PXSELC(0) = 0x0000ffff;
__gpio_as_func0(WAIT_N);
REG_NEMC_SMCR6 &= ~NEMC_SMCR_BW_MASK;
REG_NEMC_SMCR6 |= NEMC_SMCR_BW_16BIT;
/*Check the recovery signature,if exist,skip the charge_detect func.*/
signature = cpm_get_scrpad();
if ((signature == RECOVERY_SIGNATURE) || (signature == RECOVERY_SIGNATURE_SEC)) {
if (signature == RECOVERY_SIGNATURE_SEC)
cpm_set_scrpad(0);
#if defined(CONFIG_XBOOT_LOW_BATTERY_DETECT)
goto skip_chgdet;
#endif
}
#if defined(CONFIG_XBOOT_LOW_BATTERY_DETECT)
/*Usb Cable detection ,If connected ,then do charge else skip it*/
//if(charge_detect()){
if(charge_detect()&&(low_battery_detect())){
charge_logo_display();
}
skip_chgdet:
/*Before Enter the system,check the battery status,
If low battery,then Enter the hibernate mode */
while(low_battery_detect() && !charge_detect()){
low_battery_warning();
jz_pm_do_hibernate();
}
#endif
}
int jz_enet_initialize(bd_t *bis)
{
u32 reg;
dev = (struct eth_device *) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);
#if defined(CONFIG_JZ4740)
#define RD_N_PIN (32 + 29)
#define WE_N_PIN (32 + 30)
#define CS4_PIN (32 + 28)
__gpio_as_func0(CS4_PIN);
__gpio_as_func0(RD_N_PIN);
__gpio_as_func0(WE_N_PIN);
reg = REG_EMC_SMCR4;
reg = (reg & (~EMC_SMCR_BW_MASK)) | EMC_SMCR_BW_16BIT;
REG_EMC_SMCR4 = reg;
dev->iobase = 0xa8000000;
#elif defined(CONFIG_JZ4750)
#if !defined(CONFIG_AQUILA)
#define RD_N_PIN (32*2 +25)
#define WE_N_PIN (32*2 +26)
#define CS3_PIN (32*2 +23)
__gpio_as_func0(CS3_PIN);
__gpio_as_func0(RD_N_PIN);
__gpio_as_func0(WE_N_PIN);
reg = REG_EMC_SMCR3;
reg = (reg & (~EMC_SMCR_BW_MASK)) | EMC_SMCR_BW_16BIT;
REG_EMC_SMCR3 = reg;
dev->iobase = 0xac000000;
#endif // !defined(CONFIG_AQUILA)
#endif
sprintf(dev->name, "JZ ETHERNET");
dev->priv = 0;
dev->init = jz_eth_init;
dev->halt = jz_eth_halt;
dev->send = jz_eth_send;
dev->recv = jz_eth_rx;
eth_register(dev);
return 1;
}
int jz_enet_initialize(bd_t *bis)
{
u32 reg;
dev = (struct eth_device *) malloc(sizeof *dev);
memset(dev, 0, sizeof *dev);
#if defined(CONFIG_JZ4740)
#define RD_N_PIN (32 + 29)
#define WE_N_PIN (32 + 30)
#define CS4_PIN (32 + 28)
__gpio_as_func0(CS4_PIN);
__gpio_as_func0(RD_N_PIN);
__gpio_as_func0(WE_N_PIN);
reg = REG_EMC_SMCR4;
reg = (reg & (~EMC_SMCR_BW_MASK)) | EMC_SMCR_BW_16BIT;
REG_EMC_SMCR4 = reg;
dev->iobase = 0xa8000000;
#elif defined(CONFIG_JZ4750)
//#if !defined(CONFIG_AQUILA)
#ifndef CONFIG_AQUILA
#define RD_N_PIN (32*2 +25)
#define WE_N_PIN (32*2 +26)
#define CS3_PIN (32*2 +23)
__gpio_as_func0(CS3_PIN);
__gpio_as_func0(RD_N_PIN);
__gpio_as_func0(WE_N_PIN);
reg = REG_EMC_SMCR3;
reg = (reg & (~EMC_SMCR_BW_MASK)) | EMC_SMCR_BW_16BIT;
REG_EMC_SMCR3 = reg;
dev->iobase = 0xac000000;
#endif // !defined(CONFIG_AQUILA)
#elif defined(CONFIG_JZ4760) || defined(CONFIG_JZ4760B)
#define RD_N_PIN (32*0 +16) //gpa16
#define WE_N_PIN (32*0 +17) //gpa17
#if defined(CONFIG_LEPUS) || defined(CONFIG_LEPUS60B)
#define WAIT_N (32*0 + 27) //WAIT_N--->gpa27
#define CS_PIN (32*0 + 26) //CS6--->gpa26
#elif defined(CONFIG_CYGNUS)
#define CS_PIN (32*0 + 25) //CS5--->gpa25
#define WAIT_N (32*0 + 27) //WAIT_N--->gpa27
#define CS8900_RESET_PIN (32 * 1 +23) //gpb23
#endif
__gpio_as_func0(CS_PIN);
__gpio_as_func0(RD_N_PIN);
__gpio_as_func0(WE_N_PIN);
__gpio_as_func0(32 * 1 + 2);
__gpio_as_func0(32 * 1 + 3);
#if defined(CONFIG_LEPUS) || defined(CONFIG_LEPUS60B)
REG_GPIO_PXFUNS(0) = 0x0000ffff;
REG_GPIO_PXTRGC(0) = 0x0000ffff;
REG_GPIO_PXSELC(0) = 0x0000ffff;
__gpio_as_func0(WAIT_N);
reg = REG_NEMC_SMCR6;
reg = (reg & (~NEMC_SMCR_BW_MASK)) | NEMC_SMCR_BW_16BIT;
REG_NEMC_SMCR6 = reg;
dev->iobase = 0xb4000000;
#elif defined(CONFIG_CYGNUS)
__gpio_as_output(CS8900_RESET_PIN);
__gpio_set_pin(CS8900_RESET_PIN);
udelay(10000);
__gpio_clear_pin(CS8900_RESET_PIN);
__gpio_as_func0(WAIT_N);
reg = REG_NEMC_SMCR5;
reg = (reg & (~NEMC_SMCR_BW_MASK)) | NEMC_SMCR_BW_16BIT;
REG_NEMC_SMCR5 = reg;
dev->iobase = 0xb5000000;
#endif
#elif defined(CONFIG_JZ4810)
#define RD_N_PIN (32*0 +16)
#define WE_N_PIN (32*0 +17)
#define CS5_PIN (32*0 +25)
#define CS8900_RESET_PIN (32 * 1 + 23)
__gpio_as_func0(CS5_PIN);
__gpio_as_func0(RD_N_PIN);
__gpio_as_func0(WE_N_PIN);
__gpio_as_func0(32 * 1 + 2);
__gpio_as_func0(32 * 1 + 3);
__gpio_as_output(CS8900_RESET_PIN);
__gpio_set_pin(CS8900_RESET_PIN);
udelay(10000);
__gpio_clear_pin(CS8900_RESET_PIN);
reg = REG_NEMC_SMCR5;
reg = (reg & (~NEMC_SMCR_BW_MASK)) | NEMC_SMCR_BW_16BIT;
REG_NEMC_SMCR5 = reg;
dev->iobase = 0xb5000000;
#endif
sprintf(dev->name, "JZ ETHERNET");
dev->priv = 0;
dev->init = jz_eth_init;
dev->halt = jz_eth_halt;
dev->send = jz_eth_send;
dev->recv = jz_eth_rx;
eth_register(dev);
return 1;
}