Esempio n. 1
0
static void
uart_pl011_putc(struct uart_bas *bas, int c)
{

	while (!(__uart_getreg(bas, UART_FR) & FR_TXFE))
		;
	__uart_setreg(bas, UART_DR, c & 0xff);
}
Esempio n. 2
0
void
uart_pl011_putc(int c, void *arg)
{

	/* Wait when TX FIFO full. Push character otherwise. */
	while (__uart_getreg(uart_base, UART_FR) & FR_TXFF)
		;
	__uart_setreg(uart_base, UART_DR, c & 0xff);
}
Esempio n. 3
0
static void
uart_pl011_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
    int parity)
{
	/* Mask all interrupts */
	__uart_setreg(bas, UART_IMSC, __uart_getreg(bas, UART_IMSC) &
	    ~IMSC_MASK_ALL);
	
	uart_pl011_param(bas, baudrate, databits, stopbits, parity);
}
Esempio n. 4
0
void
uart_pl011_param(int baudrate, int databits, int stopbits,
    int parity)
{
	uint32_t ctrl, line;
	uint32_t baud;

	/*
	 * Zero all settings to make sure
	 * UART is disabled and not configured
	 */
	ctrl = line = 0x0;
	__uart_setreg(uart_base, UART_CR, ctrl);

	/* As we know UART is disabled we may setup the line */
	switch (databits) {
	case 7:
		line |= LCR_H_WLEN7;
		break;
	case 6:
		line |= LCR_H_WLEN6;
		break;
	case 8:
	default:
		line |= LCR_H_WLEN8;
		break;
	}

	if (stopbits == 2)
		line |= LCR_H_STP2;
	else
		line &= ~LCR_H_STP2;

	if (parity)
		line |= LCR_H_PEN;
	else
		line &= ~LCR_H_PEN;

	/* Configure the rest */
	line &=  ~LCR_H_FEN;
	ctrl |= (CR_RXE | CR_TXE | CR_UARTEN);

/*
	if (bas->rclk != 0 && baudrate != 0) {
		baud = bas->rclk * 4 / baudrate;
		__uart_setreg(bas, UART_IBRD, ((uint32_t)(baud >> 6)) & IBRD_BDIVINT);
		__uart_setreg(bas, UART_FBRD, (uint32_t)(baud & 0x3F) & FBRD_BDIVFRAC);
	}
*/
	/* Add config. to line before reenabling UART */
	__uart_setreg(uart_base, UART_LCR_H, (__uart_getreg(uart_base, UART_LCR_H) &
	    ~0xff) | line);

	__uart_setreg(uart_base, UART_CR, ctrl);
}
Esempio n. 5
0
int
uart_pl011_getc()
{
	int c;

	while (!uart_pl011_rxready())
		;
	c = __uart_getreg(uart_base, UART_DR) & 0xff;

	return (c);
}
Esempio n. 6
0
static int
uart_pl011_getc(struct uart_bas *bas, struct mtx *hwmtx)
{
	int c;

	while (!uart_pl011_rxready(bas))
		;
	c = __uart_getreg(bas, UART_DR) & 0xff;

	return (c);
}
Esempio n. 7
0
static void
uart_pl011_param(struct uart_bas *bas, int baudrate, int databits, int stopbits,
    int parity)
{
	uint32_t ctrl, line;
	uint32_t baud;

	/*
	 * Zero all settings to make sure
	 * UART is disabled and not configured
	 */
	ctrl = line = 0x0;
	__uart_setreg(bas, UART_CR, ctrl);

	/* As we know UART is disabled we may setup the line */
	switch (databits) {
	case 7:
		line |= LCR_H_WLEN7;
		break;
	case 6:
		line |= LCR_H_WLEN6;
		break;
	case 8:
	default:
		line |= LCR_H_WLEN8;
		break;
	}

	/* TODO: Calculate divisors */
	baud = (0x1 << 16) | 0x28;

	if (stopbits == 2)
		line |= LCR_H_STP2;
	else
		line &= ~LCR_H_STP2;

	if (parity)
		line |= LCR_H_PEN;
	else
		line &= ~LCR_H_PEN;

	/* Configure the rest */
	line &=  ~LCR_H_FEN;
	ctrl |= (CR_RXE | CR_TXE | CR_UARTEN);

	__uart_setreg(bas, UART_IBRD, ((uint32_t)(baud >> 16)) & IBRD_BDIVINT);
	__uart_setreg(bas, UART_FBRD, (uint32_t)(baud) & FBRD_BDIVFRAC);

	/* Add config. to line before reenabling UART */
	__uart_setreg(bas, UART_LCR_H, (__uart_getreg(bas, UART_LCR_H) &
	    ~0xff) | line);

	__uart_setreg(bas, UART_CR, ctrl);
}
Esempio n. 8
0
void
uart_pl011_init(int baudrate, int databits, int stopbits,
    int parity)
{
	/* Mask all interrupts */
	__uart_setreg(uart_base, UART_IMSC, __uart_getreg(uart_base, UART_IMSC) &
	    ~IMSC_MASK_ALL);

	uart_pl011_param(baudrate, databits, stopbits, parity);

	kprintf("Initialising PrimeCell UART (PL011)\n");
}
Esempio n. 9
0
int
uart_pl011_rxready(void)
{

	return (__uart_getreg(uart_base, UART_FR) & FR_RXFF);
}
Esempio n. 10
0
		line |= LCR_H_PEN;
	else
		line &= ~LCR_H_PEN;

	/* Configure the rest */
	line &= ~LCR_H_FEN;
	ctrl |= (CR_RXE | CR_TXE | CR_UARTEN);

	if (bas->rclk != 0 && baudrate != 0) {
		baud = bas->rclk * 4 / baudrate;
		__uart_setreg(bas, UART_IBRD, ((uint32_t)(baud >> 6)) & IBRD_BDIVINT);
		__uart_setreg(bas, UART_FBRD, (uint32_t)(baud & 0x3F) & FBRD_BDIVFRAC);
	}

	/* Add config. to line before reenabling UART */
	__uart_setreg(bas, UART_LCR_H, (__uart_getreg(bas, UART_LCR_H) &
	    ~0xff) | line);

	__uart_setreg(bas, UART_CR, ctrl);
}

static void
uart_pl011_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
    int parity)
{
	/* Mask all interrupts */
	__uart_setreg(bas, UART_IMSC, __uart_getreg(bas, UART_IMSC) &
	    ~IMSC_MASK_ALL);

	uart_pl011_param(bas, baudrate, databits, stopbits, parity);
}
Esempio n. 11
0
static int
uart_pl011_rxready(struct uart_bas *bas)
{

	return (__uart_getreg(bas, UART_FR) & FR_RXFF);
}