Esempio n. 1
0
static bool dp83865_stat(eth_phy_access_t *f, int *state)
{
    unsigned short phy_state;
    int tries;


    // Read negotiated state
    if (_eth_phy_read(f, DP83865_BMSR, f->phy_addr, &phy_state)) {
        if ((phy_state & DP83865_AUTO_NEG_COMPLETE_MASK ) == 0) {
            eth_phy_printf("... waiting for auto-negotiation");
            for (tries = 0;  tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME;  tries++) {
                if (_eth_phy_read(f, DP83865_BMSR, f->phy_addr, &phy_state)) {
                    if ((phy_state & DP83865_AUTO_NEG_COMPLETE_MASK) != 0) {
                        break;
                    }
                }
                CYGACC_CALL_IF_DELAY_US(1000000);   // 1 second
                eth_phy_printf(".");
            }
            eth_phy_printf("\n");
        }
        if ((phy_state & DP83865_AUTO_NEG_COMPLETE_MASK) != 0) {
            *state = 0;
	    if (_eth_phy_read(f, DP83865_LINK_AN, f->phy_addr, &phy_state)) {
		if ((phy_state & DP83865_LINK_STATUS_MASK) != 0) *state |= ETH_PHY_STAT_LINK;
		if ((phy_state & DP83865_SPEED_MASK) == 0x08)    *state |= ETH_PHY_STAT_100MB;   // FIXME: no 1000MB flag!   
		if ((phy_state & DP83865_DUPLEX_MASK) != 0)      *state |= ETH_PHY_STAT_FDX;
		return true;
	    }
        }
    }
    return false;
}
Esempio n. 2
0
static bool inlxt972_stat(eth_phy_access_t *f, int *state)
{
    unsigned short phy_state;
    int tries;

    // Read negotiated state
    if (_eth_phy_read(f, PHY_BMSR, f->phy_addr, &phy_state)) {
        if ((phy_state & PHY_BMSR_AUTO_NEG) == 0) {
            eth_phy_printf("... waiting for auto-negotiation");
            for (tries = 0;  tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME;  tries++) {
                if (_eth_phy_read(f, PHY_BMSR, f->phy_addr, &phy_state)) {
                    if ((phy_state & PHY_BMSR_AUTO_NEG) != 0) {
                        break;
                    }
                }
                CYGACC_CALL_IF_DELAY_US(1000000);   // 1 second
                eth_phy_printf(".");
            }
            eth_phy_printf("\n");
        }
        if ((phy_state & PHY_BMSR_AUTO_NEG) != 0) {
            *state = 0;
            if ((phy_state & PHY_BMSR_LINK) != 0) *state |= ETH_PHY_STAT_LINK;
            if ((phy_state & PHY_BMSR_100FDX) != 0) *state |= ETH_PHY_STAT_100MB | ETH_PHY_STAT_FDX;
            return true;
        }
    }
    return false;
}
Esempio n. 3
0
static bool MV88E1518_stat(eth_phy_access_t *f, int *state)
{
    unsigned short phy_state;
    int tries;
    int auto_completed = 1;

    // Read negotiated state from the Copper Status Register
    if(_eth_phy_read(f, MV88E1518_COPPER_STATUS_REGISTER, f->phy_addr, &phy_state))
    {
        if((phy_state & MV88E1518_COPPER_STATUS_AUTO_COMPLETE) == 0)
        {
            auto_completed = 0;
            eth_phy_printf("... waiting for auto-negotiation");
            for(tries = 0; tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME; tries++)
            {
                if(_eth_phy_read(f, MV88E1518_COPPER_STATUS_REGISTER, f->phy_addr, &phy_state))
                {
                    if((phy_state & MV88E1518_COPPER_STATUS_AUTO_COMPLETE) != 0)
                    {
                        auto_completed = 1;
                        break;
                    }
                }
                CYGACC_CALL_IF_DELAY_US(1000000);   // 1 second
                eth_phy_printf(".");
            }
            eth_phy_printf("\n");
        }

        // Find configuration
        if(auto_completed)
        {
            // Read Copper Specific Status Register 1 (register 17)
            _eth_phy_read(f, MV88E1518_COPPER_SPEC_STATUS_REGISTER_1, f->phy_addr, &phy_state);

            // Check link state
            if((phy_state & MV88E1518_COPPER_SPEC_STATUS_LINK) && (phy_state & MV88E1518_COPPER_SPEC_STATUS_GLOBAL_LINK))
                *state |= ETH_PHY_STAT_LINK;
            // Check speed and duplex
            if(phy_state & MV88E1518_COPPER_SPEC_STATUS_1000MBPS )
                *state |= ETH_PHY_STAT_1000MB;
            if(phy_state & MV88E1518_COPPER_SPEC_STATUS_100MBPS )
                *state |= ETH_PHY_STAT_100MB;
            if(phy_state & MV88E1518_COPPER_SPEC_STATUS_FULL_DUPLEX)
                *state |= ETH_PHY_STAT_FDX;
            return true;
        }
    }
    return false;
}
Esempio n. 4
0
void
ksz8041_diag (eth_phy_access_t * f)
{

  cyg_uint32 i;
  cyg_uint16 reg;

  eth_phy_printf ("KSZ8041 MIIM Register setings:\n");

  for (i = 0; i < 0x20; i++) {
    if (i % 2 == 0) {
      _eth_phy_read (f, i, f->phy_addr, &reg);
      eth_phy_printf ("r%02x: %04x ", i, reg);
    } else {
      _eth_phy_read (f, i, f->phy_addr, &reg);
      eth_phy_printf ("%04x\n", reg);
    }
  }
}
Esempio n. 5
0
static bool ics189x_stat(eth_phy_access_t *f, int *state)
{
    unsigned short phy_state;
    int tries;

    // Read negotiated state from the Quick Poll Detailed Status Register
    if (_eth_phy_read(f, 17, f->phy_addr, &phy_state))
    {
        if ((phy_state & Bit(4)) == 0)
        {
            eth_phy_printf("... waiting for auto-negotiation");
            for (tries = 0;  tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME;  tries++)
            {
                if (_eth_phy_read(f, 17, f->phy_addr, &phy_state))
                {
                    if ((phy_state & Bit(4)) != 0)
                    {
                        break;
                    }
                }
                CYGACC_CALL_IF_DELAY_US(1000000);   // 1 second
                eth_phy_printf(".");
            }
            eth_phy_printf("\n");
        }
        if ((phy_state & Bit(4)) != 0)
        {
            *state = 0;
            if (phy_state & Bit(0))
                *state |= ETH_PHY_STAT_LINK;
            if (phy_state & Bit(14))
                *state |= ETH_PHY_STAT_FDX;
            if (phy_state & Bit(15))
                *state |= ETH_PHY_STAT_100MB;
            return true;
        }
    }
    return false;
}
Esempio n. 6
0
static bool
ksz8041_stat (eth_phy_access_t * f, int *state)
{

  cyg_uint16 phy_state;
  cyg_uint16 phy_100ctrl_reg;
  cyg_uint32 tries;
  cyg_uint32 ms;

#ifdef  CYGDBG_DEVS_ETH_PHY
  ksz8041_diag (f);
#endif

  if (_eth_phy_read (f, PHY_BMSR, f->phy_addr, &phy_state)) {
    if ((phy_state & PHY_BMSR_AUTO_NEG) == 0) {

      eth_phy_printf ("... waiting for auto-negotiation");

      for (tries = 0; tries < CYGINT_DEVS_ETH_PHY_AUTO_NEGOTIATION_TIME;
           tries++) {
        
        if (_eth_phy_read (f, PHY_BMSR, f->phy_addr, &phy_state)) {
          if ((phy_state & PHY_BMSR_AUTO_NEG) != 0) {
            break;
          }
        } else {
          eth_phy_printf ("error: _eth_phy_read()\n");
        }
        
        //
        // Wait for 1 second
        //
        for (ms = 0; ms < 1000; ++ms) {
          CYGACC_CALL_IF_DELAY_US (1000);	// 1 ms
        }
        eth_phy_printf (".");
      }
      eth_phy_printf ("\n");
    }
    
    if ((phy_state & PHY_BMSR_AUTO_NEG) != 0) {
      *state = 0;
      if ((phy_state & PHY_BMSR_LINK) != 0) {
        *state |= ETH_PHY_STAT_LINK;
      }
      
      _eth_phy_read (f, PHY_100BASE_CTRL, f->phy_addr, &phy_100ctrl_reg);
      phy_100ctrl_reg &= PHY_100BASE_CTRL_OP_MODE_MASK;
      switch (phy_100ctrl_reg) {
        case PHY_100BASE_CTRL_10T_HDX:
          break;
          
        case PHY_100BASE_CTRL_100T_HDX:
          *state |= ETH_PHY_STAT_100MB;
          break;
          
        case PHY_100BASE_CTRL_10T_FDX:
          *state |= ETH_PHY_STAT_FDX;
          break;
          
        case PHY_100BASE_CTRL_100T_FDX:
          *state |= ETH_PHY_STAT_100MB | ETH_PHY_STAT_FDX;
          break;
          
        default:
          // force to set default 100 Full Duplex
          *state |= ETH_PHY_STAT_100MB | ETH_PHY_STAT_FDX;
      }			// switch (phy_100ctrl_reg)
      
      return true;
    }
  }
  return false;
}