void
brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
{
const struct gen_device_info *devinfo = &brw->screen->devinfo;
struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_FRAGMENT_PROGRAM */
const struct gl_program *prog = brw->programs[MESA_SHADER_FRAGMENT];
const struct brw_program *fp = brw_program_const(prog);
GLuint lookup = 0;
GLuint line_aa;
memset(key, 0, sizeof(*key));
/* Build the index for table lookup
*/
if (devinfo->gen < 6) {
struct intel_renderbuffer *depth_irb =
intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_DEPTH);
/* _NEW_COLOR */
if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) {
lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
}
if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
}
/* _NEW_DEPTH */
if (depth_irb && ctx->Depth.Test) {
lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
if (brw_depth_writes_enabled(brw))
lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
}
/* _NEW_STENCIL | _NEW_BUFFERS */
if (brw->stencil_enabled) {
lookup |= BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT;
if (ctx->Stencil.WriteMask[0] ||
ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
lookup |= BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT;
}
key->iz_lookup = lookup;
}
line_aa = BRW_WM_AA_NEVER;
/* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
if (ctx->Line.SmoothFlag) {
if (brw->reduced_primitive == GL_LINES) {
line_aa = BRW_WM_AA_ALWAYS;
}
else if (brw->reduced_primitive == GL_TRIANGLES) {
if (ctx->Polygon.FrontMode == GL_LINE) {
line_aa = BRW_WM_AA_SOMETIMES;
if (ctx->Polygon.BackMode == GL_LINE ||
(ctx->Polygon.CullFlag &&
ctx->Polygon.CullFaceMode == GL_BACK))
line_aa = BRW_WM_AA_ALWAYS;
}
else if (ctx->Polygon.BackMode == GL_LINE) {
line_aa = BRW_WM_AA_SOMETIMES;
if ((ctx->Polygon.CullFlag &&
ctx->Polygon.CullFaceMode == GL_FRONT))
line_aa = BRW_WM_AA_ALWAYS;
}
}
}
key->line_aa = line_aa;
/* _NEW_HINT */
key->high_quality_derivatives =
prog->info.uses_fddx_fddy &&
ctx->Hint.FragmentShaderDerivative == GL_NICEST;
if (devinfo->gen < 6)
key->stats_wm = brw->stats_wm;
/* _NEW_LIGHT */
key->flat_shade =
(prog->info.inputs_read & (VARYING_BIT_COL0 | VARYING_BIT_COL1)) &&
(ctx->Light.ShadeModel == GL_FLAT);
/* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
/* _NEW_TEXTURE */
brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
/* _NEW_BUFFERS */
key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
/* _NEW_COLOR */
key->force_dual_color_blend = brw->dual_color_blend_by_location &&
(ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
/* _NEW_MULTISAMPLE, _NEW_BUFFERS */
key->alpha_to_coverage = _mesa_is_alpha_to_coverage_enabled(ctx);
/* _NEW_COLOR, _NEW_BUFFERS */
key->alpha_test_replicate_alpha =
ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
_mesa_is_alpha_test_enabled(ctx);
/* _NEW_BUFFERS _NEW_MULTISAMPLE */
/* Ignore sample qualifier while computing this flag. */
if (ctx->Multisample.Enabled) {
key->persample_interp =
ctx->Multisample.SampleShading &&
(ctx->Multisample.MinSampleShadingValue *
_mesa_geometric_samples(ctx->DrawBuffer) > 1);
key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
}
/* BRW_NEW_VUE_MAP_GEOM_OUT */
if (devinfo->gen < 6 || util_bitcount64(prog->info.inputs_read &
BRW_FS_VARYING_INPUT_MASK) > 16) {
key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
}
/* _NEW_COLOR | _NEW_BUFFERS */
/* Pre-gen6, the hardware alpha test always used each render
* target's alpha to do alpha test, as opposed to render target 0's alpha
* like GL requires. Fix that by building the alpha test into the
* shader, and we'll skip enabling the fixed function alpha test.
*/
if (devinfo->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
ctx->Color.AlphaEnabled) {
key->alpha_test_func = ctx->Color.AlphaFunc;
key->alpha_test_ref = ctx->Color.AlphaRef;
}
/* The unique fragment program ID */
key->program_string_id = fp->id;
/* Whether reads from the framebuffer should behave coherently. */
key->coherent_fb_fetch = ctx->Extensions.EXT_shader_framebuffer_fetch;
}
static void
upload_wm_state(struct brw_context *brw)
{
struct gl_context *ctx = &brw->ctx;
/* BRW_NEW_FS_PROG_DATA */
const struct brw_wm_prog_data *prog_data =
brw_wm_prog_data(brw->wm.base.prog_data);
bool writes_depth = prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF;
uint32_t dw1, dw2;
/* _NEW_BUFFERS */
const bool multisampled_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
dw1 = dw2 = 0;
dw1 |= GEN7_WM_STATISTICS_ENABLE;
dw1 |= GEN7_WM_LINE_AA_WIDTH_1_0;
dw1 |= GEN7_WM_LINE_END_CAP_AA_WIDTH_0_5;
/* _NEW_LINE */
if (ctx->Line.StippleFlag)
dw1 |= GEN7_WM_LINE_STIPPLE_ENABLE;
/* _NEW_POLYGON */
if (ctx->Polygon.StippleFlag)
dw1 |= GEN7_WM_POLYGON_STIPPLE_ENABLE;
if (prog_data->uses_src_depth)
dw1 |= GEN7_WM_USES_SOURCE_DEPTH;
if (prog_data->uses_src_w)
dw1 |= GEN7_WM_USES_SOURCE_W;
dw1 |= prog_data->computed_depth_mode << GEN7_WM_COMPUTED_DEPTH_MODE_SHIFT;
dw1 |= prog_data->barycentric_interp_modes <<
GEN7_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT;
/* _NEW_COLOR, _NEW_MULTISAMPLE _NEW_BUFFERS */
/* Enable if the pixel shader kernel generates and outputs oMask.
*/
if (prog_data->uses_kill ||
_mesa_is_alpha_test_enabled(ctx) ||
_mesa_is_alpha_to_coverage_enabled(ctx) ||
prog_data->uses_omask) {
dw1 |= GEN7_WM_KILL_ENABLE;
}
/* _NEW_BUFFERS | _NEW_COLOR */
if (brw_color_buffer_write_enabled(brw) || writes_depth ||
prog_data->has_side_effects || dw1 & GEN7_WM_KILL_ENABLE) {
dw1 |= GEN7_WM_DISPATCH_ENABLE;
}
if (multisampled_fbo) {
/* _NEW_MULTISAMPLE */
if (ctx->Multisample.Enabled)
dw1 |= GEN7_WM_MSRAST_ON_PATTERN;
else
dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;
if (prog_data->persample_dispatch)
dw2 |= GEN7_WM_MSDISPMODE_PERSAMPLE;
else
dw2 |= GEN7_WM_MSDISPMODE_PERPIXEL;
} else {
dw1 |= GEN7_WM_MSRAST_OFF_PIXEL;
dw2 |= GEN7_WM_MSDISPMODE_PERSAMPLE;
}
if (prog_data->uses_sample_mask) {
dw1 |= GEN7_WM_USES_INPUT_COVERAGE_MASK;
}
/* BRW_NEW_FS_PROG_DATA */
if (prog_data->early_fragment_tests)
dw1 |= GEN7_WM_EARLY_DS_CONTROL_PREPS;
else if (prog_data->has_side_effects)
dw1 |= GEN7_WM_EARLY_DS_CONTROL_PSEXEC;
/* The "UAV access enable" bits are unnecessary on HSW because they only
* seem to have an effect on the HW-assisted coherency mechanism which we
* don't need, and the rasterization-related UAV_ONLY flag and the
* DISPATCH_ENABLE bit can be set independently from it.
* C.f. gen8_upload_ps_extra().
*
* BRW_NEW_FRAGMENT_PROGRAM | BRW_NEW_FS_PROG_DATA | _NEW_BUFFERS | _NEW_COLOR
*/
if (brw->is_haswell &&
!(brw_color_buffer_write_enabled(brw) || writes_depth) &&
prog_data->has_side_effects)
dw2 |= HSW_WM_UAV_ONLY;
BEGIN_BATCH(3);
OUT_BATCH(_3DSTATE_WM << 16 | (3 - 2));
OUT_BATCH(dw1);
OUT_BATCH(dw2);
ADVANCE_BATCH();
}
