Esempio n. 1
0
int __init mx1_clocks_init(unsigned long fref)
{
	ccm = MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR);

	_mx1_clocks_init(fref);

	clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx-gpt.0");
	clk_register_clkdev(clk[IMX1_CLK_HCLK], "ipg", "imx-gpt.0");
	clk_register_clkdev(clk[IMX1_CLK_DMA_GATE], "ahb", "imx1-dma");
	clk_register_clkdev(clk[IMX1_CLK_HCLK], "ipg", "imx1-dma");
	clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx1-uart.0");
	clk_register_clkdev(clk[IMX1_CLK_HCLK], "ipg", "imx1-uart.0");
	clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx1-uart.1");
	clk_register_clkdev(clk[IMX1_CLK_HCLK], "ipg", "imx1-uart.1");
	clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx1-uart.2");
	clk_register_clkdev(clk[IMX1_CLK_UART3_GATE], "ipg", "imx1-uart.2");
	clk_register_clkdev(clk[IMX1_CLK_HCLK], NULL, "imx1-i2c.0");
	clk_register_clkdev(clk[IMX1_CLK_PER2], "per", "imx1-cspi.0");
	clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ipg", "imx1-cspi.0");
	clk_register_clkdev(clk[IMX1_CLK_PER2], "per", "imx1-cspi.1");
	clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ipg", "imx1-cspi.1");
	clk_register_clkdev(clk[IMX1_CLK_PER2], "per", "imx1-fb.0");
	clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ipg", "imx1-fb.0");
	clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ahb", "imx1-fb.0");

	mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);

	return 0;
}
Esempio n. 2
0
int __init mx1_clocks_init(unsigned long fref)
{
	ccm = ioremap(MX1_CCM_BASE_ADDR, SZ_4K);
	BUG_ON(!ccm);

	_mx1_clocks_init(fref);

	clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx-gpt.0");
	clk_register_clkdev(clk[IMX1_CLK_HCLK], "ipg", "imx-gpt.0");
	clk_register_clkdev(clk[IMX1_CLK_DMA_GATE], "ahb", "imx1-dma");
	clk_register_clkdev(clk[IMX1_CLK_HCLK], "ipg", "imx1-dma");
	clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx1-uart.0");
	clk_register_clkdev(clk[IMX1_CLK_HCLK], "ipg", "imx1-uart.0");
	clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx1-uart.1");
	clk_register_clkdev(clk[IMX1_CLK_HCLK], "ipg", "imx1-uart.1");
	clk_register_clkdev(clk[IMX1_CLK_PER1], "per", "imx1-uart.2");
	clk_register_clkdev(clk[IMX1_CLK_UART3_GATE], "ipg", "imx1-uart.2");
	clk_register_clkdev(clk[IMX1_CLK_HCLK], NULL, "imx1-i2c.0");
	clk_register_clkdev(clk[IMX1_CLK_PER2], "per", "imx1-cspi.0");
	clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ipg", "imx1-cspi.0");
	clk_register_clkdev(clk[IMX1_CLK_PER2], "per", "imx1-cspi.1");
	clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ipg", "imx1-cspi.1");
	clk_register_clkdev(clk[IMX1_CLK_PER2], "per", "imx1-fb.0");
	clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ipg", "imx1-fb.0");
	clk_register_clkdev(clk[IMX1_CLK_DUMMY], "ahb", "imx1-fb.0");

	mxc_timer_init(MX1_TIM1_BASE_ADDR, MX1_TIM1_INT, GPT_TYPE_IMX1);

	return 0;
}
Esempio n. 3
0
static void __init mx1_clocks_init_dt(struct device_node *np)
{
	ccm = of_iomap(np, 0);
	BUG_ON(!ccm);

	_mx1_clocks_init(32768);

	clk_data.clks = clk;
	clk_data.clk_num = ARRAY_SIZE(clk);
	of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
}