static inline int max77663_rtc_do_irq(struct max77663_rtc *rtc)
{
struct device *parent = _to_parent(rtc);
u8 irq_status;
int ret;
ret = max77663_rtc_update_buffer(rtc, 0);
if (ret < 0) {
dev_err(rtc->dev, "rtc_irq: Failed to get rtc update buffer\n");
return ret;
}
ret = max77663_read(parent, MAX77663_RTC_IRQ, &irq_status, 1, 1);
if (ret < 0) {
dev_err(rtc->dev, "rtc_irq: Failed to get rtc irq status\n");
return ret;
}
dev_dbg(rtc->dev, "rtc_do_irq: irq_mask=0x%02x, irq_status=0x%02x\n",
rtc->irq_mask, irq_status);
if (!(rtc->irq_mask & RTC_IRQ_ALARM1_MASK) &&
(irq_status & RTC_IRQ_ALARM1_MASK))
rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
if (!(rtc->irq_mask & RTC_IRQ_1SEC_MASK) &&
(irq_status & RTC_IRQ_1SEC_MASK))
rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_UF);
return ret;
}
static void max77663_rtc_enable_smpl(struct max77663_rtc *rtc, u8 enable)
{
u8 val;
int ret;
u8 irq_status;
struct device *parent = _to_parent(rtc);
/* Configure SMPL Enable */
//default disable
ret = max77663_rtc_update_buffer(rtc, 0); //[geayoung.baek:20120109] append to rtc update buffer
if (ret < 0) {
dev_err(rtc->dev, "rtc_irq: Failed to get rtc update buffer\n");
return ret;
}
ret = max77663_read(parent, MAX77663_RTC_IRQ, &irq_status, 1, 1); //
dev_info(rtc->dev, "MAX77663_RTC_IRQ [0x%x]\n", irq_status);
val = 0x00; //disable
ret = max77663_rtc_write(rtc, MAX77663_RTC_SMPL, &val, 1, 1);
if (ret < 0) {
dev_err(rtc->dev, "preinit: Failed to set rtc control\n");
return ret;
}
if(enable) //enable
{
val = SMPL_ENABLE | SMPL_TIME_0_5S;
ret = max77663_rtc_write(rtc, MAX77663_RTC_SMPL, &val, 1, 1);
if (ret < 0) {
dev_err(rtc->dev, "preinit: Failed to set rtc control\n");
return ret;
}
}
}
static inline int max77663_rtc_update_buffer(struct max77663_rtc *rtc,
int write)
{
struct device *parent = _to_parent(rtc);
u8 val = FLAG_AUTO_CLEAR_MASK | RTC_WAKE_MASK;
int ret;
if (write)
val |= WB_UPDATE_MASK;
else
val |= RB_UPDATE_MASK;
dev_dbg(rtc->dev, "rtc_update_buffer: write=%d, addr=0x%x, val=0x%x\n",
write, MAX77663_RTC_UPDATE0, val);
ret = max77663_write(parent, MAX77663_RTC_UPDATE0, &val, 1, 1);
if (ret < 0) {
dev_err(rtc->dev, "rtc_update_buffer: "
"Failed to get rtc update0\n");
return ret;
}
/*
* Must wait 14ms for buffer update.
* If the sleeping time is 10us - 20ms, usleep_range() is recommended.
* Please refer Documentation/timers/timers-howto.txt.
*/
#if 1
usleep_range(15000, 15000); //[geayoung.baek:20120109] 15ms
#else
usleep_range(14000, 14000);
#endif
return 0;
}
static inline int max77620_rtc_update_buffer(struct max77620_rtc *rtc,
int write)
{
struct device *parent = _to_parent(rtc);
u8 val = FLAG_AUTO_CLEAR_MASK | RTC_WAKE_MASK;
int ret;
if (write)
val |= WB_UPDATE_MASK;
else
val |= RB_UPDATE_MASK;
dev_dbg(rtc->dev, "rtc_update_buffer: write=%d, addr=0x%x, val=0x%x\n",
write, MAX77620_REG_RTCUPDATE0, val);
ret = max77620_reg_write(parent, MAX77620_RTC_SLAVE,
MAX77620_REG_RTCUPDATE0, val);
if (ret < 0) {
dev_err(rtc->dev, "rtc_update_buffer: "
"Failed to get rtc update0\n");
return ret;
}
/* Must wait 16ms for buffer update */
usleep_range(16000, 16000);
return 0;
}
static inline int max77620_rtc_do_irq(struct max77620_rtc *rtc)
{
struct device *parent = _to_parent(rtc);
u8 irq_status;
int ret;
ret = max77620_reg_read(parent, MAX77620_RTC_SLAVE,
MAX77620_REG_RTCINT, &irq_status);
if (ret < 0) {
dev_err(rtc->dev, "rtc_irq: Failed to get rtc irq status\n");
return ret;
}
dev_dbg(rtc->dev, "rtc_do_irq: irq_mask=0x%02x, irq_status=0x%02x\n",
rtc->irq_mask, irq_status);
if (!(rtc->irq_mask & MAX77620_RTCA1_MASK) &&
(irq_status & MAX77620_RTCA1_MASK))
rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
if (!(rtc->irq_mask & MAX77620_RTC_RTC1S_MASK) &&
(irq_status & MAX77620_RTC_RTC1S_MASK))
rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_UF);
return ret;
}
static inline int max77663_rtc_irq_mask(struct max77663_rtc *rtc, u8 irq)
{
struct device *parent = _to_parent(rtc);
u8 irq_mask = rtc->irq_mask | irq;
int ret = 0;
ret = max77663_write(parent, MAX77663_RTC_IRQ_MASK, &irq_mask, 1, 1);
if (ret < 0) {
dev_err(rtc->dev, "rtc_irq_mask: Failed to set rtc irq mask\n");
goto out;
}
rtc->irq_mask = irq_mask;
out:
return ret;
}
static inline int max77663_rtc_write(struct max77663_rtc *rtc, u8 addr,
void *values, u32 len, int update_buffer)
{
struct device *parent = _to_parent(rtc);
int ret;
mutex_lock(&rtc->io_lock);
dev_dbg(rtc->dev, "rtc_write: addr=0x%x, values=0x%x, len=%u, "
"update_buffer=%d\n",
addr, *((u8 *)values), len, update_buffer);
ret = max77663_write(parent, addr, values, len, 1);
if (ret < 0)
goto out;
if (update_buffer)
ret = max77663_rtc_update_buffer(rtc, 1);
out:
mutex_unlock(&rtc->io_lock);
return ret;
}
static inline int max77620_rtc_read(struct max77620_rtc *rtc, u8 addr,
void *values, u32 len, int update_buffer)
{
struct device *parent = _to_parent(rtc);
int ret;
mutex_lock(&rtc->io_lock);
if (update_buffer) {
ret = max77620_rtc_update_buffer(rtc, 0);
if (ret < 0)
goto out;
}
ret = max77620_reg_reads(parent, MAX77620_RTC_SLAVE, addr, len, values);
dev_dbg(rtc->dev, "rtc_read: addr=0x%x, values=0x%x, len=%u, "
"update_buffer=%d\n",
addr, *((u8 *)values), len, update_buffer);
out:
mutex_unlock(&rtc->io_lock);
return ret;
}
static int max77620_rtc_preinit(struct max77620_rtc *rtc)
{
struct device *parent = _to_parent(rtc);
u8 val;
int ret;
/* Mask all interrupts */
rtc->irq_mask = 0xFF;
ret = max77620_rtc_write(rtc, MAX77620_REG_RTCINTM,
&rtc->irq_mask, 1, 1);
if (ret < 0) {
dev_err(rtc->dev, "preinit: Failed to set rtc irq mask\n");
return ret;
}
max77620_rtc_read(rtc, MAX77620_REG_RTCINT, &val, 1, 0);
/* Configure Binary mode and 24hour mode */
val = MAX77620_HRMODEM_MASK;
ret = max77620_rtc_write(rtc, MAX77620_REG_RTCCNTL, &val, 1, 1);
if (ret < 0) {
dev_err(rtc->dev, "preinit: Failed to set rtc control\n");
return ret;
}
/* It should be disabled alarm wakeup to wakeup from sleep
* by EN1 input signal */
ret = max77620_reg_update(parent, MAX77620_PWR_SLAVE,
MAX77620_REG_ONOFFCNFG2, ONOFF_WK_ALARM1_MASK, 0);
if (ret < 0) {
dev_err(rtc->dev, "preinit: Failed to set onoff cfg2\n");
return ret;
}
return 0;
}
static int max77663_rtc_preinit(struct max77663_rtc *rtc)
{
struct device *parent = _to_parent(rtc);
u8 val;
int ret;
/* Mask all interrupts */
#ifdef CONFIG_MFD_MAX77663_SMPL
u8 smpl_enable = 0;
#if 1
smpl_enable = max77663_smpl_status;
#else
lge_nvdata_read(LGE_NVDATA_SMPL_EN_OFFSET, &smpl_enable,1);
#endif
#ifdef CONFIG_MFD_MAX77663_SMPL_DEFAULT_ENABLE
if(!smpl_enable)
#else
if(smpl_enable)
#endif
{
rtc->irq_mask = 0xF7;
}
else
{
rtc->irq_mask = 0xFF;
}
#endif
//rtc->irq_mask = 0x1C; //0x1D; // max77663_rtc_do_irq RTCA1M
ret = max77663_rtc_write(rtc, MAX77663_RTC_IRQ_MASK, &rtc->irq_mask, 1,
0);
if (ret < 0) {
dev_err(rtc->dev, "preinit: Failed to set rtc irq mask\n");
return ret;
}
/* Configure Binary mode and 24hour mode */
val = HR_MODE_MASK;
ret = max77663_rtc_write(rtc, MAX77663_RTC_CTRL, &val, 1, 0);
if (ret < 0) {
dev_err(rtc->dev, "preinit: Failed to set rtc control\n");
return ret;
}
#ifdef CONFIG_MFD_MAX77663_SMPL
#ifdef CONFIG_MFD_MAX77663_SMPL_DEFAULT_ENABLE
max77663_rtc_enable_smpl(rtc, !smpl_enable);
#else
max77663_rtc_enable_smpl(rtc, smpl_enable);
#endif
#endif
/* It should be disabled alarm wakeup to wakeup from sleep
* by EN1 input signal */
ret = max77663_set_bits(parent, MAX77663_REG_ONOFF_CFG2,
ONOFF_WK_ALARM1_MASK, 0, 0);
if (ret < 0) {
dev_err(rtc->dev, "preinit: Failed to set onoff cfg2\n");
return ret;
}
return 0;
}
