/** * @brief Deactivates the ADC peripheral. * * @param[in] adcp pointer to the @p ADCDriver object * * @notapi */ void adc_lld_stop(ADCDriver *adcp) { /* If in ready state then disables the ADC clock and analog part.*/ if (adcp->state == ADC_READY) { /* Releasing the associated DMA channel.*/ dmaStreamRelease(adcp->dmastp); /* Stopping the ongoing conversion, if any.*/ adc_lld_stop_adc(adcp); /* Disabling ADC analog circuit and regulator.*/ adc_lld_analog_off(adcp); adc_lld_vreg_off(adcp); #if STM32_ADC_USE_ADC1 if (&ADCD1 == adcp) rccDisableADC12(FALSE); #endif #if STM32_ADC_USE_ADC3 if (&ADCD3 == adcp) rccDisableADC34(FALSE); #endif } }
/** * @brief Deactivates the ADC peripheral. * * @param[in] adcp pointer to the @p ADCDriver object * * @notapi */ void adc_lld_stop(ADCDriver *adcp) { /* If in ready state then disables the ADC clock and analog part.*/ if (adcp->state == ADC_READY) { /* Releasing the associated DMA channel.*/ dmaStreamFreeI(adcp->dmastp); adcp->dmastp = NULL; /* Stopping the ongoing conversion, if any.*/ adc_lld_stop_adc(adcp); /* Disabling ADC analog circuit and regulator.*/ adc_lld_analog_off(adcp); adc_lld_vreg_off(adcp); #if defined(STM32L4XX) || defined(STM32L4XXP) /* Resetting CCR options except default ones.*/ adcp->adcc->CCR = STM32_ADC_ADC123_CLOCK_MODE | ADC_DMA_MDMA; #endif #if STM32_ADC_USE_ADC1 if (&ADCD1 == adcp) { #if defined(STM32F3XX) /* Resetting CCR options except default ones.*/ adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA; #endif clkmask &= ~(1 << 0); } #endif #if STM32_ADC_USE_ADC2 if (&ADCD2 == adcp) { #if defined(STM32F3XX) /* Resetting CCR options except default ones.*/ adcp->adcc->CCR = STM32_ADC_ADC12_CLOCK_MODE | ADC_DMA_MDMA; #endif clkmask &= ~(1 << 1); } #endif #if STM32_ADC_USE_ADC3 if (&ADCD3 == adcp) { #if defined(STM32F3XX) /* Resetting CCR options except default ones.*/ adcp->adcc->CCR = STM32_ADC_ADC34_CLOCK_MODE | ADC_DMA_MDMA; #endif clkmask &= ~(1 << 2); } #endif #if STM32_ADC_USE_ADC4 if (&ADCD4 == adcp) { #if defined(STM32F3XX) /* Resetting CCR options except default ones.*/ adcp->adcc->CCR = STM32_ADC_ADC34_CLOCK_MODE | ADC_DMA_MDMA; #endif clkmask &= ~(1 << 3); } #endif #if defined(STM32F3XX) #if STM32_HAS_ADC1 || STM32_HAS_ADC2 if ((clkmask & 0x3) == 0) { rccDisableADC12(); } #endif #if STM32_HAS_ADC3 || STM32_HAS_ADC4 if ((clkmask & 0xC) == 0) { rccDisableADC34(); } #endif #endif #if defined(STM32L4XX) || defined(STM32L4XXP) if ((clkmask & 0x7) == 0) { rccDisableADC123(); } #endif } }