Esempio n. 1
0
/**
 * \brief ECB mode encryption test with DMA.
 */
static void ecb_mode_test_dma(void)
{
	printf("\r\n-----------------------------------\r\n");
	printf("- 128bit cryptographic key\r\n");
	printf("- ECB cipher mode\r\n");
	printf("- DMA mode\r\n");
	printf("- 4 32bit words with DMA\r\n");
	printf("-----------------------------------\r\n");

//! [encryption_mode]

	state = false;

	/* Configure the AES. */
	g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
	g_aes_cfg.key_size = AES_KEY_SIZE_128;
	g_aes_cfg.start_mode = AES_AUTO_START;
	g_aes_cfg.opmode = AES_ECB_MODE;
	g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
	g_aes_cfg.lod = false;
	aes_set_config(&aes_instance,AES, &g_aes_cfg);

	/* Set the cryptographic key. */
	aes_write_key(&aes_instance, key128);

	/* The initialization vector is not used by the ECB cipher mode. */

	dma_start_transfer_job(&example_resource_tx);
	aes_set_new_message(&aes_instance);
	aes_clear_new_message(&aes_instance);

	/* Wait DMA transfer */
	while (false == state) {
	}

	/* Wait for the end of the encryption process. */
	while (!(aes_get_status(&aes_instance) & AES_ENCRYPTION_COMPLETE)) {
	}

	state = false;
	dma_start_transfer_job(&example_resource_rx);

	/* Wait DMA transfer */
	while (false == state) {
	}

	if ((ref_cipher_text_ecb[0] != output_data[0]) ||
			(ref_cipher_text_ecb[1] != output_data[1]) ||
			(ref_cipher_text_ecb[2] != output_data[2]) ||
			(ref_cipher_text_ecb[3] != output_data[3])) {
		printf("\r\nKO!!!\r\n");
	} else {
		printf("\r\nOK!!!\r\n");
	}
//! [encryption_mode]

}
Esempio n. 2
0
/**
 * \brief Test ECB mode encryption with DMA.
 *
 * \param test Current test case.
 */
static void run_ecb_mode_test_dma(const struct test_case *test)
{
	/* Configure DMAC. */
	configure_dma_aes_wr();
	configure_dma_aes_rd();

	/* Configure the AES. */
	g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
	g_aes_cfg.key_size = AES_KEY_SIZE_128;
	g_aes_cfg.start_mode = AES_AUTO_START;
	g_aes_cfg.opmode = AES_ECB_MODE;
	g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
	g_aes_cfg.lod = false;
	aes_set_config(&aes_instance,AES, &g_aes_cfg);

	/* Set the cryptographic key. */
	aes_write_key(&aes_instance, key128);

	dma_start_transfer_job(&example_resource_tx);
	aes_set_new_message(&aes_instance);
	aes_clear_new_message(&aes_instance);
	/* Wait for the end of the encryption process. */
	delay_ms(30);
	dma_start_transfer_job(&example_resource_rx);
	delay_ms(30);
	if ((ref_cipher_text_ecb[0] != output_data[0]) ||
			(ref_cipher_text_ecb[1] != output_data[1]) ||
			(ref_cipher_text_ecb[2] != output_data[2]) ||
			(ref_cipher_text_ecb[3] != output_data[3])) {
		flag = false;
	} else {
		flag = true;
	}

	test_assert_true(test, flag == true, "ECB mode encryption with DMA not work!");
}
Esempio n. 3
0
/**
 * \brief Test CTR mode encryption and decryption.
 *
 * \param test Current test case.
 */
static void run_ctr_mode_test(const struct test_case *test)
{
	state = false;

	/* Configure the AES. */
	g_aes_inst.aes_cfg->encrypt_mode = AES_ENCRYPTION;
	g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
	g_aes_inst.aes_cfg->dma_mode = AES_MANUAL_MODE;
	g_aes_inst.aes_cfg->opmode = AES_CTR_MODE;
	g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
	g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
	aes_set_config(&g_aes_inst);

	/* Beginning of a new message. */
	aes_set_new_message(&g_aes_inst);

	/* Set the cryptographic key. */
	aes_write_key(&g_aes_inst, key128);

	/* Set the initialization vector. */
	aes_write_initvector(&g_aes_inst, init_vector_ctr);

	/* Write the data to be ciphered to the input data registers. */
	aes_write_input_data(&g_aes_inst, ref_plain_text[0]);
	aes_write_input_data(&g_aes_inst, ref_plain_text[1]);
	aes_write_input_data(&g_aes_inst, ref_plain_text[2]);
	aes_write_input_data(&g_aes_inst, ref_plain_text[3]);

	/* Wait for the end of the encryption process. */
	delay_ms(30);

	/* check the result. */
	if ((ref_cipher_text_ctr[0] != output_data[0]) ||
			(ref_cipher_text_ctr[1] != output_data[1]) ||
			(ref_cipher_text_ctr[2] != output_data[2]) ||
			(ref_cipher_text_ctr[3] != output_data[3])) {
		flag = false;
	} else {
		flag = true;
	}

	test_assert_true(test, flag == true, "CTR mode encryption not work!");

	state = false;

	/* Configure the AES. */
	g_aes_inst.aes_cfg->encrypt_mode = AES_DECRYPTION;
	g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
	g_aes_inst.aes_cfg->dma_mode = AES_MANUAL_MODE;
	g_aes_inst.aes_cfg->opmode = AES_CTR_MODE;
	g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
	g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
	aes_set_config(&g_aes_inst);

	/* Beginning of a new message. */
	aes_set_new_message(&g_aes_inst);

	/* Set the cryptographic key. */
	aes_write_key(&g_aes_inst, key128);

	/* Set the initialization vector. */
	aes_write_initvector(&g_aes_inst, init_vector_ctr);

	/* Write the data to be deciphered to the input data registers. */
	aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[0]);
	aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[1]);
	aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[2]);
	aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[3]);

	/* Wait for the end of the decryption process. */
	delay_ms(30);

	/* check the result. */
	if ((ref_plain_text[0] != output_data[0]) ||
			(ref_plain_text[1] != output_data[1]) ||
			(ref_plain_text[2] != output_data[2]) ||
			(ref_plain_text[3] != output_data[3])) {
		flag = false;
	} else {
		flag = true;
	}

	test_assert_true(test, flag == true, "CTR mode decryption not work!");
}
Esempio n. 4
0
/**
 * \brief Test ECB mode encryption and decryption with PDCA.
 *
 * \param test Current test case.
 */
static void run_ecb_mode_test_pdca(const struct test_case *test)
{
	/* Change the AES interrupt callback function. */
	aes_set_callback(&g_aes_inst, AES_INTERRUPT_INPUT_BUFFER_READY,
			aes_callback_pdca, 1);

	/* Enable PDCA module clock */
	pdca_enable(PDCA);

	state = false;

	/* Configure the AES. */
	g_aes_inst.aes_cfg->encrypt_mode = AES_ENCRYPTION;
	g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
	g_aes_inst.aes_cfg->dma_mode = AES_DMA_MODE;
	g_aes_inst.aes_cfg->opmode = AES_ECB_MODE;
	g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
	g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
	aes_set_config(&g_aes_inst);

	/* Beginning of a new message. */
	aes_set_new_message(&g_aes_inst);

	/* Set the cryptographic key. */
	aes_write_key(&g_aes_inst, key128);

	/* The initialization vector is not used by the ECB cipher mode. */

	/* Write the data to be ciphered to the input data registers. */
	/* Init PDCA channel with the pdca_options.*/
	PDCA_TX_OPTIONS.addr = (void *)ref_plain_text; /* memory address */
	PDCA_TX_OPTIONS.pid = AESA_PDCA_ID_TX; /* select peripheral - AESA TX.*/
	PDCA_TX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
	PDCA_TX_OPTIONS.r_addr = (void *)0; /* next memory address */
	PDCA_TX_OPTIONS.r_size = 0; /* next transfer counter */
	PDCA_TX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
	pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS);
	PDCA_RX_OPTIONS.addr = (void *)output_data; /* memory address */
	PDCA_RX_OPTIONS.pid = AESA_PDCA_ID_RX; /* select peripheral - AESA RX.*/
	PDCA_RX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
	PDCA_RX_OPTIONS.r_addr = (void *)0; /* next memory address */
	PDCA_RX_OPTIONS.r_size = 0; /* next transfer counter */
	PDCA_RX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
	pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS);

	/* Enable PDCA channel, start transfer data. */
	pdca_channel_enable(PDCA_TX_CHANNEL);

	/* Wait for the end of the encryption process. */
	delay_ms(30);

	/* Disable PDCA channel. */
	pdca_channel_disable(PDCA_RX_CHANNEL);
	pdca_channel_disable(PDCA_TX_CHANNEL);

	if ((ref_cipher_text_ecb[0] != output_data[0]) ||
			(ref_cipher_text_ecb[1] != output_data[1]) ||
			(ref_cipher_text_ecb[2] != output_data[2]) ||
			(ref_cipher_text_ecb[3] != output_data[3])) {
		flag = false;
	} else {
		flag = true;
	}

	test_assert_true(test, flag == true, "ECB mode encryption not work!");

	state = false;

	/* Configure the AES. */
	g_aes_inst.aes_cfg->encrypt_mode = AES_DECRYPTION;
	g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
	g_aes_inst.aes_cfg->dma_mode = AES_DMA_MODE;
	g_aes_inst.aes_cfg->opmode = AES_ECB_MODE;
	g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
	g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
	aes_set_config(&g_aes_inst);

	/* Beginning of a new message. */
	aes_set_new_message(&g_aes_inst);

	/* Set the cryptographic key. */
	aes_write_key(&g_aes_inst, key128);

	/* The initialization vector is not used by the ECB cipher mode. */

	/* Write the data to be deciphered to the input data registers. */
	/* Init PDCA channel with the pdca_options.*/
	PDCA_TX_OPTIONS.addr = (void *)ref_cipher_text_ecb; /* memory address */
	PDCA_TX_OPTIONS.pid = AESA_PDCA_ID_TX; /* select peripheral - AESA TX.*/
	PDCA_TX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
	PDCA_TX_OPTIONS.r_addr = (void *)0; /* next memory address */
	PDCA_TX_OPTIONS.r_size = 0; /* next transfer counter */
	PDCA_TX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
	pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS);
	PDCA_RX_OPTIONS.addr = (void *)output_data; /* memory address */
	PDCA_RX_OPTIONS.pid = AESA_PDCA_ID_RX; /* select peripheral - AESA RX.*/
	PDCA_RX_OPTIONS.size = AES_EXAMPLE_REFBUF_SIZE; /* transfer counter */
	PDCA_RX_OPTIONS.r_addr = (void *)0; /* next memory address */
	PDCA_RX_OPTIONS.r_size = 0; /* next transfer counter */
	PDCA_RX_OPTIONS.transfer_size = PDCA_MR_SIZE_WORD;
	pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS);

	/* Enable PDCA channel, start transfer data. */
	pdca_channel_enable(PDCA_TX_CHANNEL);

	/* Wait for the end of the decryption process. */
	delay_ms(30);

	/* Disable PDCA channel. */
	pdca_channel_disable(PDCA_RX_CHANNEL);
	pdca_channel_disable(PDCA_TX_CHANNEL);

	/* check the result. */
	if ((ref_plain_text[0] != output_data[0]) ||
			(ref_plain_text[1] != output_data[1]) ||
			(ref_plain_text[2] != output_data[2]) ||
			(ref_plain_text[3] != output_data[3])) {
		flag = false;
	} else {
		flag = true;
	}

	test_assert_true(test, flag == true, "ECB mode decryption not work!");

	/* Disable PDCA module clock */
	pdca_disable(PDCA);

	/* Change back the AES interrupt callback function. */
	aes_set_callback(&g_aes_inst, AES_INTERRUPT_INPUT_BUFFER_READY,
			aes_callback, 1);
}
/**
 * \brief CTR mode encryption and decryption test.
 */
static void ctr_mode_test(void)
{
	printf("\r\n-----------------------------------\r\n");
	printf("- 128bit cryptographic key\r\n");
	printf("- CTR cipher mode\r\n");
	printf("- Auto start mode\r\n");
	printf("- 4 32bit words\r\n");
	printf("-----------------------------------\r\n");

	state = false;

	/* Configure the AES. */
	g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
	g_aes_cfg.key_size = AES_KEY_SIZE_128;
	g_aes_cfg.start_mode = AES_AUTO_START;
	g_aes_cfg.opmode = AES_CTR_MODE;
	g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
	g_aes_cfg.lod = false;
	aes_set_config(&aes_instance,AES, &g_aes_cfg);

	/* Set the cryptographic key. */
	aes_write_key(&aes_instance, key128);

	/* Set the initialization vector. */
	aes_write_init_vector(&aes_instance, init_vector_ctr);
	aes_set_new_message(&aes_instance);
	/* Write the data to be ciphered to the input data registers. */
	aes_write_input_data(&aes_instance, ref_plain_text);
	aes_clear_new_message(&aes_instance);

	/* Wait for the end of the encryption process. */
	while (false == state) {
	}

	/* check the result. */
	if ((ref_cipher_text_ctr[0] != output_data[0]) ||
			(ref_cipher_text_ctr[1] != output_data[1]) ||
			(ref_cipher_text_ctr[2] != output_data[2]) ||
			(ref_cipher_text_ctr[3] != output_data[3])) {
		printf("\r\nKO!!!\r\n");
	} else {
		printf("\r\nOK!!!\r\n");
	}

	printf("\r\n-----------------------------------\r\n");
	printf("- 128bit cryptographic key\r\n");
	printf("- CTR decipher mode\r\n");
	printf("- Auto start mode\r\n");
	printf("- 4 32bit words\r\n");
	printf("-----------------------------------\r\n");

	state = false;

	/* Configure the AES. */
	g_aes_cfg.encrypt_mode = AES_DECRYPTION;
	g_aes_cfg.key_size = AES_KEY_SIZE_128;
	g_aes_cfg.start_mode = AES_MANUAL_START;
	g_aes_cfg.opmode = AES_CTR_MODE;
	g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
	g_aes_cfg.lod = false;
	aes_set_config(&aes_instance,AES, &g_aes_cfg);

	/* Set the cryptographic key. */
	aes_write_key(&aes_instance, key128);

	/* Set the initialization vector. */
	aes_write_init_vector(&aes_instance, init_vector_ctr);

	/* Write the data to be deciphered to the input data registers. */
	aes_write_input_data(&aes_instance, ref_cipher_text_ctr);

	aes_set_new_message(&aes_instance);
	aes_start(&aes_instance);
	aes_clear_new_message(&aes_instance);
	/* Wait for the end of the decryption process. */
	while (false == state) {
	}

	/* check the result. */
	if ((ref_plain_text[0] != output_data[0]) ||
			(ref_plain_text[1] != output_data[1]) ||
			(ref_plain_text[2] != output_data[2]) ||
			(ref_plain_text[3] != output_data[3])) {
		printf("\r\nKO!!!\r\n");
	} else {
		printf("\r\nOK!!!\r\n");
	}
}
Esempio n. 6
0
/**
 * \brief Test CTR mode encryption and decryption.
 *
 * \param test Current test case.
 */
static void run_ctr_mode_test(const struct test_case *test)
{
	/* Configure the AES. */
	g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
	g_aes_cfg.key_size = AES_KEY_SIZE_128;
	g_aes_cfg.start_mode = AES_AUTO_START;
	g_aes_cfg.opmode = AES_CTR_MODE;
	g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
	g_aes_cfg.lod = false;
	aes_set_config(&aes_instance,AES, &g_aes_cfg);

	/* Set the cryptographic key. */
	aes_write_key(&aes_instance, key128);

	/* Set the initialization vector. */
	aes_write_init_vector(&aes_instance, init_vector_ctr);

	aes_set_new_message(&aes_instance);
	/* Write the data to be ciphered to the input data registers. */
	aes_write_input_data(&aes_instance, ref_plain_text);
	aes_clear_new_message(&aes_instance);

	/* Wait for the end of the encryption process. */
	delay_ms(30);

	aes_read_output_data(&aes_instance,output_data);
	/* check the result. */
	if ((ref_cipher_text_ctr[0] != output_data[0]) ||
			(ref_cipher_text_ctr[1] != output_data[1]) ||
			(ref_cipher_text_ctr[2] != output_data[2]) ||
			(ref_cipher_text_ctr[3] != output_data[3])) {
		flag = false;
	} else {
		flag = true;
	}

	test_assert_true(test, flag == true, "CTR mode encryption not work!");

	/* Configure the AES. */
	g_aes_cfg.encrypt_mode = AES_DECRYPTION;
	g_aes_cfg.key_size = AES_KEY_SIZE_128;
	g_aes_cfg.start_mode = AES_AUTO_START;
	g_aes_cfg.opmode = AES_CTR_MODE;
	g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
	g_aes_cfg.lod = false;
	aes_set_config(&aes_instance,AES, &g_aes_cfg);

	/* Set the cryptographic key. */
	aes_write_key(&aes_instance, key128);

	/* Set the initialization vector. */
	aes_write_init_vector(&aes_instance, init_vector_ctr);

	aes_set_new_message(&aes_instance);
	/* Write the data to be deciphered to the input data registers. */
	aes_write_input_data(&aes_instance, ref_cipher_text_ctr);
	aes_clear_new_message(&aes_instance);

	/* Wait for the end of the decryption process. */
	delay_ms(30);

	aes_read_output_data(&aes_instance,output_data);
	/* check the result. */
	if ((ref_plain_text[0] != output_data[0]) ||
			(ref_plain_text[1] != output_data[1]) ||
			(ref_plain_text[2] != output_data[2]) ||
			(ref_plain_text[3] != output_data[3])) {
		flag = false;
	} else {
		flag = true;
	}

	test_assert_true(test, flag == true, "CTR mode decryption not work!");
}
Esempio n. 7
0
/**
 * \brief CTR mode encryption and decryption test.
 */
static void ctr_mode_test(void)
{
	printf("\r\n-----------------------------------\r\n");
	printf("- 128bit cryptographic key\r\n");
	printf("- CTR cipher mode\r\n");
	printf("- all counter measures\r\n");
	printf("- input of 4 32bit words\r\n");
	printf("-----------------------------------\r\n");

	state = false;

	/* Configure the AES. */
	g_aes_inst.aes_cfg->encrypt_mode = AES_ENCRYPTION;
	g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
	g_aes_inst.aes_cfg->dma_mode = AES_MANUAL_MODE;
	g_aes_inst.aes_cfg->opmode = AES_CTR_MODE;
	g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
	g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
	aes_set_config(&g_aes_inst);

	/* Beginning of a new message. */
	aes_set_new_message(&g_aes_inst);

	/* Set the cryptographic key. */
	aes_write_key(&g_aes_inst, key128);

	/* Set the initialization vector. */
	aes_write_initvector(&g_aes_inst, init_vector_ctr);

	/* Write the data to be ciphered to the input data registers. */
	aes_write_input_data(&g_aes_inst, ref_plain_text[0]);
	aes_write_input_data(&g_aes_inst, ref_plain_text[1]);
	aes_write_input_data(&g_aes_inst, ref_plain_text[2]);
	aes_write_input_data(&g_aes_inst, ref_plain_text[3]);

	/* Wait for the end of the encryption process. */
	while (false == state) {
	}

	/* check the result. */
	if ((ref_cipher_text_ctr[0] != output_data[0]) ||
			(ref_cipher_text_ctr[1] != output_data[1]) ||
			(ref_cipher_text_ctr[2] != output_data[2]) ||
			(ref_cipher_text_ctr[3] != output_data[3])) {
		printf("\r\nKO!!!\r\n");
	} else {
		printf("\r\nOK!!!\r\n");
	}

	printf("\r\n-----------------------------------\r\n");
	printf("- 128bit cryptographic key\r\n");
	printf("- CTR decipher mode\r\n");
	printf("- all counter measures\r\n");
	printf("- input of 4 32bit words\r\n");
	printf("-----------------------------------\r\n");

	state = false;

	/* Configure the AES. */
	g_aes_inst.aes_cfg->encrypt_mode = AES_DECRYPTION;
	g_aes_inst.aes_cfg->key_size = AES_KEY_SIZE_128;
	g_aes_inst.aes_cfg->dma_mode = AES_MANUAL_MODE;
	g_aes_inst.aes_cfg->opmode = AES_CTR_MODE;
	g_aes_inst.aes_cfg->cfb_size = AES_CFB_SIZE_128;
	g_aes_inst.aes_cfg->countermeasure_mask = AES_COUNTERMEASURE_TYPE_ALL;
	aes_set_config(&g_aes_inst);

	/* Beginning of a new message. */
	aes_set_new_message(&g_aes_inst);

	/* Set the cryptographic key. */
	aes_write_key(&g_aes_inst, key128);

	/* Set the initialization vector. */
	aes_write_initvector(&g_aes_inst, init_vector_ctr);

	/* Write the data to be deciphered to the input data registers. */
	aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[0]);
	aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[1]);
	aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[2]);
	aes_write_input_data(&g_aes_inst, ref_cipher_text_ctr[3]);

	/* Wait for the end of the decryption process. */
	while (false == state) {
	}

	/* check the result. */
	if ((ref_plain_text[0] != output_data[0]) ||
			(ref_plain_text[1] != output_data[1]) ||
			(ref_plain_text[2] != output_data[2]) ||
			(ref_plain_text[3] != output_data[3])) {
		printf("\r\nKO!!!\r\n");
	} else {
		printf("\r\nOK!!!\r\n");
	}
}
Esempio n. 8
0
/**
 * \brief ECB mode encryption and decryption test.
 */
static void ecb_mode_test(void)
{
	printf("\r\n-----------------------------------\r\n");
	printf("- 128bit cryptographic key\r\n");
	printf("- ECB cipher mode\r\n");
	printf("- Auto start mode\r\n");
	printf("- 4 32bit words\r\n");
	printf("-----------------------------------\r\n");

//! [encryption_mode]

	state = false;

	/* Configure the AES. */
	g_aes_cfg.encrypt_mode = AES_ENCRYPTION;
	g_aes_cfg.key_size = AES_KEY_SIZE_128;
	g_aes_cfg.start_mode = AES_AUTO_START;
	g_aes_cfg.opmode = AES_ECB_MODE;
	g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
	g_aes_cfg.lod = false;
	aes_set_config(&aes_instance,AES, &g_aes_cfg);

	/* Set the cryptographic key. */
	aes_write_key(&aes_instance, key128);

	/* The initialization vector is not used by the ECB cipher mode. */

	aes_set_new_message(&aes_instance);
	/* Write the data to be ciphered to the input data registers. */
	aes_write_input_data(&aes_instance, ref_plain_text);
	aes_clear_new_message(&aes_instance);
	/* Wait for the end of the encryption process. */
	while (!(aes_get_status(&aes_instance) & AES_ENCRYPTION_COMPLETE)) {
	}
	aes_read_output_data(&aes_instance,output_data);

	if ((ref_cipher_text_ecb[0] != output_data[0]) ||
			(ref_cipher_text_ecb[1] != output_data[1]) ||
			(ref_cipher_text_ecb[2] != output_data[2]) ||
			(ref_cipher_text_ecb[3] != output_data[3])) {
		printf("\r\nKO!!!\r\n");
	} else {
		printf("\r\nOK!!!\r\n");
	}
//! [encryption_mode]
	printf("\r\n-----------------------------------\r\n");
	printf("- 128bit cryptographic key\r\n");
	printf("- ECB decipher mode\r\n");
	printf("- Auto start mode\r\n");
	printf("- 4 32bit words\r\n");
	printf("-----------------------------------\r\n");

//! [decryption_mode]

	state = false;

	/* Configure the AES. */
	g_aes_cfg.encrypt_mode = AES_DECRYPTION;
	g_aes_cfg.key_size = AES_KEY_SIZE_128;
	g_aes_cfg.start_mode = AES_AUTO_START;
	g_aes_cfg.opmode = AES_ECB_MODE;
	g_aes_cfg.cfb_size = AES_CFB_SIZE_128;
	g_aes_cfg.lod = false;
	aes_set_config(&aes_instance,AES, &g_aes_cfg);

	/* Set the cryptographic key. */
	aes_write_key(&aes_instance, key128);

	/* The initialization vector is not used by the ECB cipher mode. */

	/* Write the data to be deciphered to the input data registers. */
	aes_write_input_data(&aes_instance, ref_cipher_text_ecb);

	/* Wait for the end of the decryption process. */
	while (!(aes_get_status(&aes_instance) & AES_ENCRYPTION_COMPLETE)) {
	}
	aes_read_output_data(&aes_instance,output_data);

	/* check the result. */
	if ((ref_plain_text[0] != output_data[0]) ||
			(ref_plain_text[1] != output_data[1]) ||
			(ref_plain_text[2] != output_data[2]) ||
			(ref_plain_text[3] != output_data[3])) {
		printf("\r\nKO!!!\r\n");
	} else {
		printf("\r\nOK!!!\r\n");
	}
//! [decryption_mode]

}