int
aic7770_config(struct ahc_softc *ahc, struct aic7770_identity *entry, u_int io)
{
u_long l;
u_long s;
int error;
int have_seeprom;
u_int hostconf;
u_int irq;
u_int intdef;
error = entry->setup(ahc);
have_seeprom = 0;
if (error != 0)
return (error);
error = aic7770_map_registers(ahc, io);
if (error != 0)
return (error);
/*
* Before we continue probing the card, ensure that
* its interrupts are *disabled*. We don't want
* a misstep to hang the machine in an interrupt
* storm.
*/
ahc_intr_enable(ahc, FALSE);
ahc->description = entry->name;
error = ahc_softc_init(ahc);
error = ahc_reset(ahc);
if (error != 0)
return (error);
/* Make sure we have a valid interrupt vector */
intdef = ahc_inb(ahc, INTDEF);
irq = intdef & VECTOR;
switch (irq) {
case 9:
case 10:
case 11:
case 12:
case 14:
case 15:
break;
default:
printf("aic7770_config: illegal irq setting %d\n", intdef);
return (ENXIO);
}
if ((intdef & EDGE_TRIG) != 0)
ahc->flags |= AHC_EDGE_INTERRUPT;
switch (ahc->chip & (AHC_EISA|AHC_VL)) {
case AHC_EISA:
{
u_int biosctrl;
u_int scsiconf;
u_int scsiconf1;
biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL);
scsiconf = ahc_inb(ahc, SCSICONF);
scsiconf1 = ahc_inb(ahc, SCSICONF + 1);
/* Get the primary channel information */
if ((biosctrl & CHANNEL_B_PRIMARY) != 0)
ahc->flags |= 1;
if ((biosctrl & BIOSMODE) == BIOSDISABLED) {
ahc->flags |= AHC_USEDEFAULTS;
} else {
if ((ahc->features & AHC_WIDE) != 0) {
ahc->our_id = scsiconf1 & HWSCSIID;
if (scsiconf & TERM_ENB)
ahc->flags |= AHC_TERM_ENB_A;
} else {
ahc->our_id = scsiconf & HSCSIID;
ahc->our_id_b = scsiconf1 & HSCSIID;
if (scsiconf & TERM_ENB)
ahc->flags |= AHC_TERM_ENB_A;
if (scsiconf1 & TERM_ENB)
ahc->flags |= AHC_TERM_ENB_B;
}
}
if ((ahc_inb(ahc, HA_274_BIOSGLOBAL) & HA_274_EXTENDED_TRANS))
ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B;
break;
}
case AHC_VL:
{
have_seeprom = aha2840_load_seeprom(ahc);
break;
}
default:
break;
}
if (have_seeprom == 0) {
free(ahc->seep_config, M_DEVBUF);
ahc->seep_config = NULL;
}
/*
* Ensure autoflush is enabled
*/
ahc_outb(ahc, SBLKCTL, ahc_inb(ahc, SBLKCTL) & ~AUTOFLUSHDIS);
/* Setup the FIFO threshold and the bus off time */
hostconf = ahc_inb(ahc, HOSTCONF);
ahc_outb(ahc, BUSSPD, hostconf & DFTHRSH);
ahc_outb(ahc, BUSTIME, (hostconf << 2) & BOFF);
/*
* Generic aic7xxx initialization.
*/
error = ahc_init(ahc);
if (error != 0)
return (error);
error = aic7770_map_int(ahc, irq);
if (error != 0)
return (error);
ahc_list_lock(&l);
/*
* Link this softc in with all other ahc instances.
*/
ahc_softc_insert(ahc);
/*
* Enable the board's BUS drivers
*/
ahc_outb(ahc, BCTL, ENABLE);
/*
* Allow interrupts.
*/
ahc_lock(ahc, &s);
ahc_intr_enable(ahc, TRUE);
ahc_unlock(ahc, &s);
ahc_list_unlock(&l);
return (0);
}
void
ahc_cardbus_attach(device_t parent, device_t self, void *aux)
{
struct cardbus_attach_args *ca = aux;
struct ahc_cardbus_softc *csc = device_private(self);
struct ahc_softc *ahc = &csc->sc_ahc;
cardbus_devfunc_t ct = ca->ca_ct;
bus_space_tag_t bst;
bus_space_handle_t bsh;
pcireg_t reg;
u_int sxfrctl1 = 0;
u_char sblkctl;
ahc->sc_dev = self;
csc->sc_ct = ct;
csc->sc_tag = ca->ca_tag;
printf(": Adaptec ADP-1480 SCSI\n");
/*
* Map the device.
*/
csc->sc_csr = PCI_COMMAND_MASTER_ENABLE;
if (Cardbus_mapreg_map(csc->sc_ct, AHC_CARDBUS_MMBA,
PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
&bst, &bsh, NULL, &csc->sc_size) == 0) {
csc->sc_bar = AHC_CARDBUS_MMBA;
csc->sc_csr |= PCI_COMMAND_MEM_ENABLE;
} else if (Cardbus_mapreg_map(csc->sc_ct, AHC_CARDBUS_IOBA,
PCI_MAPREG_TYPE_IO, 0, &bst, &bsh, NULL, &csc->sc_size) == 0) {
csc->sc_bar = AHC_CARDBUS_IOBA;
csc->sc_csr |= PCI_COMMAND_IO_ENABLE;
} else {
csc->sc_bar = 0;
aprint_error("%s: unable to map device registers\n",
ahc_name(ahc));
return;
}
/* Enable the appropriate bits in the PCI CSR. */
reg = Cardbus_conf_read(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG);
reg &= ~(PCI_COMMAND_IO_ENABLE|PCI_COMMAND_MEM_ENABLE);
reg |= csc->sc_csr;
Cardbus_conf_write(ct, ca->ca_tag, PCI_COMMAND_STATUS_REG, reg);
/*
* Make sure the latency timer is set to some reasonable
* value.
*/
reg = Cardbus_conf_read(ct, ca->ca_tag, PCI_BHLC_REG);
if (PCI_LATTIMER(reg) < 0x20) {
reg &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT);
reg |= (0x20 << PCI_LATTIMER_SHIFT);
Cardbus_conf_write(ct, ca->ca_tag, PCI_BHLC_REG, reg);
}
ahc_set_name(ahc, device_xname(ahc->sc_dev));
ahc->parent_dmat = ca->ca_dmat;
ahc->tag = bst;
ahc->bsh = bsh;
/*
* ADP-1480 is always an AIC-7860.
*/
ahc->chip = AHC_AIC7860 | AHC_PCI;
ahc->features = AHC_AIC7860_FE|AHC_REMOVABLE;
ahc->bugs |= AHC_TMODE_WIDEODD_BUG|AHC_CACHETHEN_BUG|AHC_PCI_MWI_BUG;
if (PCI_REVISION(ca->ca_class) >= 1)
ahc->bugs |= AHC_PCI_2_1_RETRY_BUG;
if (ahc_softc_init(ahc) != 0)
return;
/*
* On all CardBus adapters, we allow SCB paging.
*/
ahc->flags = AHC_PAGESCBS;
ahc->channel = 'A';
ahc_intr_enable(ahc, FALSE);
ahc_reset(ahc);
/*
* Establish the interrupt.
*/
ahc->ih = Cardbus_intr_establish(ct, IPL_BIO, ahc_intr, ahc);
if (ahc->ih == NULL) {
aprint_error("%s: unable to establish interrupt\n",
ahc_name(ahc));
return;
}
ahc->seep_config = malloc(sizeof(*ahc->seep_config),
M_DEVBUF, M_NOWAIT);
if (ahc->seep_config == NULL)
return;
ahc_check_extport(ahc, &sxfrctl1);
/*
* Take the LED out of diagnostic mode.
*/
sblkctl = ahc_inb(ahc, SBLKCTL);
ahc_outb(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON)));
/*
* I don't know where this is set in the SEEPROM or by the
* BIOS, so we default to 100%.
*/
ahc_outb(ahc, DSPCISTATUS, DFTHRSH_100);
if (ahc->flags & AHC_USEDEFAULTS) {
int our_id;
/*
* Assume only one connector and always turn
* on termination.
*/
our_id = AHC_CARDBUS_DEFAULT_SCSI_ID;
sxfrctl1 = STPWEN;
ahc_outb(ahc, SCSICONF, our_id | ENSPCHK | RESET_SCSI);
ahc->our_id = our_id;
}
printf("%s: aic7860", ahc_name(ahc));
/*
* Record our termination setting for the
* generic initialization routine.
*/
if ((sxfrctl1 & STPWEN) != 0)
ahc->flags |= AHC_TERM_ENB_A;
if (ahc_init(ahc)) {
ahc_free(ahc);
return;
}
ahc_attach(ahc);
}
static void
ahc_eisa_attach(device_t parent, device_t self, void *aux)
{
struct ahc_softc *ahc = device_private(self);
struct eisa_attach_args *ea = aux;
eisa_chipset_tag_t ec = ea->ea_ec;
eisa_intr_handle_t ih;
bus_space_tag_t iot = ea->ea_iot;
bus_space_handle_t ioh;
int irq, intrtype;
const char *intrstr, *intrtypestr;
u_int biosctrl;
u_int scsiconf;
u_int scsiconf1;
u_char intdef;
#ifdef AHC_DEBUG
int i;
#endif
char intrbuf[EISA_INTRSTR_LEN];
ahc->sc_dev = self;
if (bus_space_map(iot, EISA_SLOT_ADDR(ea->ea_slot) +
AHC_EISA_SLOT_OFFSET, AHC_EISA_IOSIZE, 0, &ioh)) {
aprint_error_dev(ahc->sc_dev, "could not map I/O addresses");
return;
}
if ((irq = ahc_aic77xx_irq(iot, ioh)) < 0) {
aprint_error_dev(ahc->sc_dev, "ahc_aic77xx_irq failed!");
goto free_io;
}
if (strcmp(ea->ea_idstring, "ADP7770") == 0) {
printf(": %s\n", EISA_PRODUCT_ADP7770);
} else if (strcmp(ea->ea_idstring, "ADP7771") == 0) {
printf(": %s\n", EISA_PRODUCT_ADP7771);
} else {
printf(": Unknown device type %s", ea->ea_idstring);
goto free_io;
}
ahc_set_name(ahc, device_xname(ahc->sc_dev));
ahc->parent_dmat = ea->ea_dmat;
ahc->chip = AHC_AIC7770|AHC_EISA;
ahc->features = AHC_AIC7770_FE;
ahc->flags = AHC_PAGESCBS;
ahc->bugs = AHC_TMODE_WIDEODD_BUG;
ahc->tag = iot;
ahc->bsh = ioh;
ahc->channel = 'A';
if (ahc_softc_init(ahc) != 0)
goto free_io;
ahc_intr_enable(ahc, FALSE);
if (ahc_reset(ahc) != 0)
goto free_io;
if (eisa_intr_map(ec, irq, &ih)) {
aprint_error_dev(ahc->sc_dev, "couldn't map interrupt (%d)\n",
irq);
goto free_io;
}
intdef = bus_space_read_1(iot, ioh, INTDEF);
if (intdef & EDGE_TRIG) {
intrtype = IST_EDGE;
intrtypestr = "edge triggered";
} else {
intrtype = IST_LEVEL;
intrtypestr = "level sensitive";
}
intrstr = eisa_intr_string(ec, ih, intrbuf, sizeof(intrbuf));
ahc->ih = eisa_intr_establish(ec, ih,
intrtype, IPL_BIO, ahc_intr, ahc);
if (ahc->ih == NULL) {
aprint_error_dev(ahc->sc_dev, "couldn't establish %s interrupt",
intrtypestr);
if (intrstr != NULL)
aprint_error(" at %s", intrstr);
aprint_error("\n");
goto free_io;
}
if (intrstr != NULL)
aprint_normal_dev(ahc->sc_dev, "%s interrupting at %s\n",
intrtypestr, intrstr);
/*
* Now that we know we own the resources we need, do the
* card initialization.
*
* First, the aic7770 card specific setup.
*/
biosctrl = ahc_inb(ahc, HA_274_BIOSCTRL);
scsiconf = ahc_inb(ahc, SCSICONF);
scsiconf1 = ahc_inb(ahc, SCSICONF + 1);
#ifdef AHC_DEBUG
for (i = TARG_SCSIRATE; i <= HA_274_BIOSCTRL; i+=8) {
printf("0x%x, 0x%x, 0x%x, 0x%x, "
"0x%x, 0x%x, 0x%x, 0x%x\n",
ahc_inb(ahc, i),
ahc_inb(ahc, i+1),
ahc_inb(ahc, i+2),
ahc_inb(ahc, i+3),
ahc_inb(ahc, i+4),
ahc_inb(ahc, i+5),
ahc_inb(ahc, i+6),
ahc_inb(ahc, i+7));
}
#endif
/* Get the primary channel information */
if ((biosctrl & CHANNEL_B_PRIMARY) != 0)
ahc->flags |= AHC_PRIMARY_CHANNEL;
if ((biosctrl & BIOSMODE) == BIOSDISABLED) {
ahc->flags |= AHC_USEDEFAULTS;
} else if ((ahc->features & AHC_WIDE) != 0) {
ahc->our_id = scsiconf1 & HWSCSIID;
if (scsiconf & TERM_ENB)
ahc->flags |= AHC_TERM_ENB_A;
} else {
ahc->our_id = scsiconf & HSCSIID;
ahc->our_id_b = scsiconf1 & HSCSIID;
if (scsiconf & TERM_ENB)
ahc->flags |= AHC_TERM_ENB_A;
if (scsiconf1 & TERM_ENB)
ahc->flags |= AHC_TERM_ENB_B;
}
if ((ahc_inb(ahc, HA_274_BIOSGLOBAL) & HA_274_EXTENDED_TRANS))
ahc->flags |= AHC_EXTENDED_TRANS_A|AHC_EXTENDED_TRANS_B;
/* Attach sub-devices */
if (ahc_aic77xx_attach(ahc) == 0)
return; /* succeed */
/* failed */
eisa_intr_disestablish(ec, ahc->ih);
free_io:
bus_space_unmap(iot, ioh, AHC_EISA_IOSIZE);
}
void
ahc_isa_attach(device_t parent, device_t self, void *aux)
{
struct ahc_softc *ahc = device_private(self);
struct isa_attach_args *ia = aux;
bus_space_tag_t iot = ia->ia_iot;
bus_space_handle_t ioh;
int irq, intrtype;
const char *intrtypestr;
char idstring[EISA_IDSTRINGLEN];
u_char intdef;
ahc->sc_dev = self;
aprint_naive(": SCSI controller\n");
if (bus_space_map(iot, ia->ia_io[0].ir_addr, ia->ia_io[0].ir_size,
0, &ioh)) {
aprint_error(": can't map i/o space\n");
return;
}
if (!ahc_isa_idstring(iot, ioh, idstring)) {
aprint_error(": can't read ID string\n");
goto free_io;
}
if ((irq = ahc_aic77xx_irq(iot, ioh)) < 0) {
aprint_error(": ahc_aic77xx_irq failed\n");
goto free_io;
}
if (strcmp(idstring, "ADP7756") == 0) {
aprint_normal(": %s\n", EISA_PRODUCT_ADP7756);
} else if (strcmp(idstring, "ADP7757") == 0) {
aprint_normal(": %s\n", EISA_PRODUCT_ADP7757);
} else {
aprint_error(": unknown device type %s\n", idstring);
goto free_io;
}
/*
* Tell the bus-DMA interface that we can do 32bit DMA
* NOTE: this variable is first referenced in ahc_init().
*/
ahc->sc_dmaflags = ISABUS_DMA_32BIT;
ahc_set_name(ahc, device_xname(ahc->sc_dev));
ahc->parent_dmat = ia->ia_dmat;
ahc->channel = 'A';
ahc->chip = AHC_AIC7770|AHC_VL;
ahc->features = AHC_AIC7770_FE;
ahc->bugs |= AHC_TMODE_WIDEODD_BUG;
ahc->flags |= AHC_PAGESCBS;
ahc->tag = iot;
ahc->bsh = ioh;
if (ahc_softc_init(ahc) != 0)
goto free_io;
ahc_intr_enable(ahc, false);
if (ahc_reset(ahc) != 0)
goto free_io;
intdef = bus_space_read_1(iot, ioh, INTDEF);
if (intdef & EDGE_TRIG) {
intrtype = IST_EDGE;
intrtypestr = "edge triggered";
} else {
intrtype = IST_LEVEL;
intrtypestr = "level sensitive";
}
ahc->ih = isa_intr_establish(ia->ia_ic, irq,
intrtype, IPL_BIO, ahc_intr, ahc);
if (ahc->ih == NULL) {
aprint_error_dev(ahc->sc_dev,
"couldn't establish %s interrupt\n", intrtypestr);
goto free_io;
}
/*
* Tell the user what type of interrupts we're using.
* useful for debugging irq problems
*/
if (bootverbose) {
aprint_verbose_dev(ahc->sc_dev, "Using %s interrupts\n",
intrtypestr);
}
/*
* Now that we know we own the resources we need, do the
* card initialization.
*/
aha2840_load_seeprom(ahc);
/* Attach sub-devices */
if (ahc_aic77xx_attach(ahc) == 0)
return; /* succeed */
/* failed */
isa_intr_disestablish(ia->ia_ic, ahc->ih);
free_io:
bus_space_unmap(iot, ioh, ia->ia_io[0].ir_size);
}
int
ahc_pci_config(struct ahc_softc *ahc, const struct ahc_pci_identity *entry)
{
u_int command;
u_int our_id;
u_int sxfrctl1;
u_int scsiseq;
u_int dscommand0;
uint32_t devconfig;
int error;
uint8_t sblkctl;
our_id = 0;
error = entry->setup(ahc);
if (error != 0)
return (error);
ahc->chip |= AHC_PCI;
ahc->description = entry->name;
pci_set_power_state(ahc->dev_softc, AHC_POWER_STATE_D0);
error = ahc_pci_map_registers(ahc);
if (error != 0)
return (error);
ahc_intr_enable(ahc, FALSE);
devconfig = ahc_pci_read_config(ahc->dev_softc, DEVCONFIG, 4);
if ((ahc->flags & AHC_39BIT_ADDRESSING) != 0) {
if (bootverbose)
printf("%s: Enabling 39Bit Addressing\n",
ahc_name(ahc));
devconfig |= DACEN;
}
devconfig |= PCIERRGENDIS;
ahc_pci_write_config(ahc->dev_softc, DEVCONFIG, devconfig, 4);
command = ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, 2);
command |= PCIM_CMD_BUSMASTEREN;
ahc_pci_write_config(ahc->dev_softc, PCIR_COMMAND, command, 2);
ahc->flags |= AHC_PAGESCBS;
error = ahc_softc_init(ahc);
if (error != 0)
return (error);
if ((ahc->flags & AHC_DISABLE_PCI_PERR) != 0)
ahc->seqctl |= FAILDIS;
ahc->bus_intr = ahc_pci_intr;
ahc->bus_chip_init = ahc_pci_chip_init;
if ((ahc_inb(ahc, HCNTRL) & POWRDN) == 0) {
ahc_pause(ahc);
if ((ahc->features & AHC_ULTRA2) != 0)
our_id = ahc_inb(ahc, SCSIID_ULTRA2) & OID;
else
our_id = ahc_inb(ahc, SCSIID) & OID;
sxfrctl1 = ahc_inb(ahc, SXFRCTL1) & STPWEN;
scsiseq = ahc_inb(ahc, SCSISEQ);
} else {
sxfrctl1 = STPWEN;
our_id = 7;
scsiseq = 0;
}
error = ahc_reset(ahc, FALSE);
if (error != 0)
return (ENXIO);
if ((ahc->features & AHC_DT) != 0) {
u_int sfunct;
sfunct = ahc_inb(ahc, SFUNCT) & ~ALT_MODE;
ahc_outb(ahc, SFUNCT, sfunct | ALT_MODE);
ahc_outb(ahc, OPTIONMODE,
OPTIONMODE_DEFAULTS|AUTOACKEN|BUSFREEREV|EXPPHASEDIS);
ahc_outb(ahc, SFUNCT, sfunct);
ahc_outb(ahc, CRCCONTROL1, CRCVALCHKEN|CRCENDCHKEN|CRCREQCHKEN
|TARGCRCENDEN);
}
dscommand0 = ahc_inb(ahc, DSCOMMAND0);
dscommand0 |= MPARCKEN|CACHETHEN;
if ((ahc->features & AHC_ULTRA2) != 0) {
dscommand0 &= ~DPARCKEN;
}
if ((ahc->bugs & AHC_CACHETHEN_DIS_BUG) != 0)
dscommand0 |= CACHETHEN;
if ((ahc->bugs & AHC_CACHETHEN_BUG) != 0)
dscommand0 &= ~CACHETHEN;
ahc_outb(ahc, DSCOMMAND0, dscommand0);
ahc->pci_cachesize =
ahc_pci_read_config(ahc->dev_softc, CSIZE_LATTIME,
1) & CACHESIZE;
ahc->pci_cachesize *= 4;
if ((ahc->bugs & AHC_PCI_2_1_RETRY_BUG) != 0
&& ahc->pci_cachesize == 4) {
ahc_pci_write_config(ahc->dev_softc, CSIZE_LATTIME,
0, 1);
ahc->pci_cachesize = 0;
}
if ((ahc->features & AHC_ULTRA) != 0) {
uint32_t devconfig;
devconfig = ahc_pci_read_config(ahc->dev_softc,
DEVCONFIG, 4);
if ((devconfig & REXTVALID) == 0)
ahc->features &= ~AHC_ULTRA;
}
check_extport(ahc, &sxfrctl1);
sblkctl = ahc_inb(ahc, SBLKCTL);
ahc_outb(ahc, SBLKCTL, (sblkctl & ~(DIAGLEDEN|DIAGLEDON)));
if ((ahc->features & AHC_ULTRA2) != 0) {
ahc_outb(ahc, DFF_THRSH, RD_DFTHRSH_MAX|WR_DFTHRSH_MAX);
} else {
ahc_outb(ahc, DSPCISTATUS, DFTHRSH_100);
}
if (ahc->flags & AHC_USEDEFAULTS) {
if ((ahc->flags & AHC_NO_BIOS_INIT) == 0
&& scsiseq != 0) {
printf("%s: Using left over BIOS settings\n",
ahc_name(ahc));
ahc->flags &= ~AHC_USEDEFAULTS;
ahc->flags |= AHC_BIOS_ENABLED;
} else {
our_id = 0x07;
sxfrctl1 = STPWEN;
}
ahc_outb(ahc, SCSICONF, our_id|ENSPCHK|RESET_SCSI);
ahc->our_id = our_id;
}
ahc_probe_ext_scbram(ahc);
if ((sxfrctl1 & STPWEN) != 0)
ahc->flags |= AHC_TERM_ENB_A;
ahc->bus_softc.pci_softc.devconfig =
ahc_pci_read_config(ahc->dev_softc, DEVCONFIG, 4);
ahc->bus_softc.pci_softc.command =
ahc_pci_read_config(ahc->dev_softc, PCIR_COMMAND, 1);
ahc->bus_softc.pci_softc.csize_lattime =
ahc_pci_read_config(ahc->dev_softc, CSIZE_LATTIME, 1);
ahc->bus_softc.pci_softc.dscommand0 = ahc_inb(ahc, DSCOMMAND0);
ahc->bus_softc.pci_softc.dspcistatus = ahc_inb(ahc, DSPCISTATUS);
if ((ahc->features & AHC_DT) != 0) {
u_int sfunct;
sfunct = ahc_inb(ahc, SFUNCT) & ~ALT_MODE;
ahc_outb(ahc, SFUNCT, sfunct | ALT_MODE);
ahc->bus_softc.pci_softc.optionmode = ahc_inb(ahc, OPTIONMODE);
ahc->bus_softc.pci_softc.targcrccnt = ahc_inw(ahc, TARGCRCCNT);
ahc_outb(ahc, SFUNCT, sfunct);
ahc->bus_softc.pci_softc.crccontrol1 =
ahc_inb(ahc, CRCCONTROL1);
}
if ((ahc->features & AHC_MULTI_FUNC) != 0)
ahc->bus_softc.pci_softc.scbbaddr = ahc_inb(ahc, SCBBADDR);
if ((ahc->features & AHC_ULTRA2) != 0)
ahc->bus_softc.pci_softc.dff_thrsh = ahc_inb(ahc, DFF_THRSH);
error = ahc_init(ahc);
if (error != 0)
return (error);
ahc->init_level++;
return ahc_pci_map_int(ahc);
}
