static int __init aic_of_init(struct device_node *node, struct device_node *parent) { struct irq_chip_generic *gc; struct irq_domain *domain; if (aic_domain) return -EEXIST; domain = aic_common_of_init(node, &aic_irq_ops, "atmel-aic", NR_AIC_IRQS); if (IS_ERR(domain)) return PTR_ERR(domain); aic_common_irq_fixup(aic_irq_fixups); aic_domain = domain; gc = irq_get_domain_generic_chip(domain, 0); gc->chip_types[0].regs.eoi = AT91_AIC_EOICR; gc->chip_types[0].regs.enable = AT91_AIC_IECR; gc->chip_types[0].regs.disable = AT91_AIC_IDCR; gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg; gc->chip_types[0].chip.irq_retrigger = aic_retrigger; gc->chip_types[0].chip.irq_set_type = aic_set_type; gc->chip_types[0].chip.irq_suspend = aic_suspend; gc->chip_types[0].chip.irq_resume = aic_resume; gc->chip_types[0].chip.irq_pm_shutdown = aic_pm_shutdown; aic_hw_init(domain); set_handle_irq(aic_handle); return 0; }
static int __init aic5_of_init(struct device_node *node, struct device_node *parent, int nirqs) { struct irq_chip_generic *gc; struct irq_domain *domain; int nchips; int i; if (nirqs > NR_AIC5_IRQS) return -EINVAL; if (aic5_domain) return -EEXIST; domain = aic_common_of_init(node, &aic5_irq_ops, "atmel-aic5", nirqs); if (IS_ERR(domain)) return PTR_ERR(domain); aic_common_irq_fixup(aic5_irq_fixups); aic5_domain = domain; nchips = aic5_domain->revmap_size / 32; for (i = 0; i < nchips; i++) { gc = irq_get_domain_generic_chip(domain, i * 32); gc->chip_types[0].regs.eoi = AT91_AIC5_EOICR; gc->chip_types[0].chip.irq_mask = aic5_mask; gc->chip_types[0].chip.irq_unmask = aic5_unmask; gc->chip_types[0].chip.irq_retrigger = aic5_retrigger; gc->chip_types[0].chip.irq_set_type = aic5_set_type; gc->chip_types[0].chip.irq_suspend = aic5_suspend; gc->chip_types[0].chip.irq_resume = aic5_resume; gc->chip_types[0].chip.irq_pm_shutdown = aic5_pm_shutdown; } aic5_hw_init(domain); set_handle_irq(aic5_handle); return 0; }