Esempio n. 1
0
File: Synth.cpp Progetto: 5nizza/sdf
BDD Synth::get_bdd_for_sign_lit(uint lit) {
    /* lit is an AIGER variable index with a 'sign' */

    if (bdd_by_aiger_unlit.find(STRIP_LIT(lit)) != bdd_by_aiger_unlit.end()) {
        BDD res = bdd_by_aiger_unlit[STRIP_LIT(lit)];
        if (IS_NEGATED(lit))
            return ~res;
    }

    uint stripped_lit = STRIP_LIT(lit);
    BDD res;

    if (stripped_lit == 0) {
        res = cudd.bddZero();
    }
    else if (aiger_is_input(aiger_spec, stripped_lit) ||
             aiger_is_latch(aiger_spec, stripped_lit)) {
        res = cudd.ReadVars(cudd_by_aiger[stripped_lit]);
//        MASSERT(res.NodeReadIndex() == stripped_lit/2, "that bug again: impossible: " << res.NodeReadIndex() << " vs " << stripped_lit/2 );
    }
    else { // aiger_and
        aiger_and *and_ = aiger_is_and(aiger_spec, stripped_lit);
        res = get_bdd_for_sign_lit(and_->rhs0) & get_bdd_for_sign_lit(and_->rhs1);
    }

    bdd_by_aiger_unlit[stripped_lit] = res;

    return IS_NEGATED(lit) ? (~res):res;
}
Esempio n. 2
0
File: Synth.cpp Progetto: 5nizza/sdf
vector<BDD> Synth::get_substitution() {
    vector<BDD> substitution;

    for (uint i = 0; i < (uint)cudd.ReadSize(); ++i) {
        if (aiger_is_latch(aiger_spec, aiger_by_cudd[i]))
            substitution.push_back(transition_func.find(aiger_by_cudd[i])->second);
        else
            substitution.push_back(cudd.ReadVars(i));
    }

    return substitution;
}
Esempio n. 3
0
static simpaig *
build (void)
{
  simpaig *aig, *res, *shifted, *tmp, *lhs, *rhs, *out;
  aiger_symbol *symbol;
  unsigned i, j;

  lois = malloc ((model->maxvar + 1) * sizeof lois[0]);
  for (i = 0; i <= model->maxvar; i++)
    {
      lois[i].idx = i;
      lois[i].aig = 0;
    }

  for (i = 0; i <= model->maxvar; i++)
    {
      aig = build_rec (i * 2);
      assert (aig == lois[i].aig);
    }

  for (i = 0; i <= model->maxvar; i++)
    symbol = aiger_is_latch (model, 2 * i);

  for (i = 0; i < model->num_latches; i++)
    {
      lhs = build_rec (model->latches[i].lit);
      rhs = simpaig_false (mgr);
      simpaig_assign (mgr, lhs, rhs);
      simpaig_dec (mgr, rhs);
    }

  for (i = 1; i <= k; i++)
    {
      for (j = 0; j < model->num_latches; j++)
	{
	  tmp = build_rec (model->latches[j].lit);
	  lhs = simpaig_shift (mgr, tmp, i);
	  tmp = build_rec (model->latches[j].next);
	  rhs = simpaig_shift (mgr, tmp, i - 1);
	  simpaig_assign (mgr, lhs, rhs);
	  simpaig_dec (mgr, rhs);
	  simpaig_dec (mgr, lhs);
	}
    }

  out = build_rec (model->outputs[0].lit);
  res = simpaig_false (mgr);
  for (i = 0; i <= k; i++)
    {
      shifted = simpaig_shift (mgr, out, i);
      tmp = simpaig_or (mgr, res, shifted);
      simpaig_dec (mgr, shifted);
      simpaig_dec (mgr, res);
      res = tmp;
    }

  tmp = simpaig_substitute (mgr, res);
  simpaig_dec (mgr, res);
  res = tmp;

  return res;
}