void gennor(void) { #if defined(COUNT_INSTR) inc_m32abs(&instr_count[86]); #endif #ifdef INTERPRET_NOR gencallinterp((unsigned long long)NOR, 0); #else int rs = allocate_register_64((unsigned long long *)dst->f.r.rs); int rt = allocate_register_64((unsigned long long *)dst->f.r.rt); int rd = allocate_register_64_w((unsigned long long *)dst->f.r.rd); if (rs == rd) { or_reg64_reg64(rd, rt); not_reg64(rd); } else if (rt == rd) { or_reg64_reg64(rd, rs); not_reg64(rd); } else { mov_reg64_reg64(rd, rs); or_reg64_reg64(rd, rt); not_reg64(rd); } #endif }
void gendsubu(void) { #if defined(COUNT_INSTR) inc_m32abs(&instr_count[92]); #endif #ifdef INTERPRET_DSUBU gencallinterp((unsigned long long)DSUBU, 0); #else int rs = allocate_register_64((unsigned long long *)dst->f.r.rs); int rt = allocate_register_64((unsigned long long *)dst->f.r.rt); int rd = allocate_register_64_w((unsigned long long *)dst->f.r.rd); if (rs == rd) sub_reg64_reg64(rd, rt); else if (rt == rd) { neg_reg64(rd); add_reg64_reg64(rd, rs); } else { mov_reg64_reg64(rd, rs); sub_reg64_reg64(rd, rt); } #endif }
void gendsllv(void) { #if defined(COUNT_INSTR) inc_m32rel(&instr_count[68]); #endif #ifdef INTERPRET_DSLLV gencallinterp((unsigned long long)cached_interpreter_table.DSLLV, 0); #else int rt, rd; allocate_register_32_manually(ECX, (unsigned int *)dst->f.r.rs); rt = allocate_register_64((unsigned long long *)dst->f.r.rt); rd = allocate_register_64_w((unsigned long long *)dst->f.r.rd); if (rd != ECX) { mov_reg64_reg64(rd, rt); shl_reg64_cl(rd); } else { int temp; temp = lru_register(); free_register(temp); mov_reg64_reg64(temp, rt); shl_reg64_cl(temp); mov_reg64_reg64(rd, temp); } #endif }
void gendsrav(void) { #if defined(COUNT_INSTR) inc_m32abs(&instr_count[70]); #endif #ifdef INTERPRET_DSRAV gencallinterp((unsigned long long)DSRAV, 0); #else int rt, rd; allocate_register_32_manually(ECX, (unsigned int *)dst->f.r.rs); rt = allocate_register_64((unsigned long long *)dst->f.r.rt); rd = allocate_register_64_w((unsigned long long *)dst->f.r.rd); if (rd != ECX) { mov_reg64_reg64(rd, rt); sar_reg64_cl(rd); } else { int temp; temp = lru_register(); free_register(temp); mov_reg64_reg64(temp, rt); sar_reg64_cl(temp); mov_reg64_reg64(rd, temp); } #endif }
void gensltu(void) { #if defined(COUNT_INSTR) inc_m32abs(&instr_count[88]); #endif #ifdef INTERPRET_SLTU gencallinterp((unsigned long long)SLTU, 0); #else int rs = allocate_register_64((unsigned long long *)dst->f.r.rs); int rt = allocate_register_64((unsigned long long *)dst->f.r.rt); int rd = allocate_register_64_w((unsigned long long *)dst->f.r.rd); cmp_reg64_reg64(rs, rt); setb_reg8(rd); and_reg64_imm8(rd, 1); #endif }
void genslt(void) { #if defined(COUNT_INSTR) inc_m32rel(&instr_count[87]); #endif #ifdef INTERPRET_SLT gencallinterp((unsigned long long)cached_interpreter_table.SLT, 0); #else int rs = allocate_register_64((unsigned long long *)dst->f.r.rs); int rt = allocate_register_64((unsigned long long *)dst->f.r.rt); int rd = allocate_register_64_w((unsigned long long *)dst->f.r.rd); cmp_reg64_reg64(rs, rt); setl_reg8(rd); and_reg64_imm8(rd, 1); #endif }
static void genbltz_test(void) { int rs_64bit = is64((unsigned int *)dst->f.i.rs); if (rs_64bit == 0) { #ifdef __x86_64__ int rs = allocate_register_32((unsigned int *)dst->f.i.rs); #else int rs = allocate_register((unsigned int *)dst->f.i.rs); #endif cmp_reg32_imm32(rs, 0); #ifdef __x86_64__ setl_m8rel((unsigned char *) &branch_taken); #else jge_rj(12); mov_m32_imm32((unsigned int *)(&branch_taken), 1); // 10 jmp_imm_short(10); // 2 mov_m32_imm32((unsigned int *)(&branch_taken), 0); // 10 #endif } else if (rs_64bit == -1) { #ifdef __x86_64__ cmp_m32rel_imm32(((unsigned int *)dst->f.i.rs)+1, 0); setl_m8rel((unsigned char *) &branch_taken); #else cmp_m32_imm32(((unsigned int *)dst->f.i.rs)+1, 0); jge_rj(12); mov_m32_imm32((unsigned int *)(&branch_taken), 1); // 10 jmp_imm_short(10); // 2 mov_m32_imm32((unsigned int *)(&branch_taken), 0); // 10 #endif } else { #ifdef __x86_64__ int rs = allocate_register_64((uint64_t*)dst->f.i.rs); cmp_reg64_imm8(rs, 0); setl_m8rel((unsigned char *) &branch_taken); #else int rs2 = allocate_64_register2((unsigned int *)dst->f.i.rs); cmp_reg32_imm32(rs2, 0); jge_rj(12); mov_m32_imm32((unsigned int *)(&branch_taken), 1); // 10 jmp_imm_short(10); // 2 mov_m32_imm32((unsigned int *)(&branch_taken), 0); // 10 #endif } }
void genand(void) { #if defined(COUNT_INSTR) inc_m32abs(&instr_count[83]); #endif #ifdef INTERPRET_AND gencallinterp((unsigned long long)AND, 0); #else int rs = allocate_register_64((unsigned long long *)dst->f.r.rs); int rt = allocate_register_64((unsigned long long *)dst->f.r.rt); int rd = allocate_register_64_w((unsigned long long *)dst->f.r.rd); if (rs == rd) and_reg64_reg64(rd, rt); else if (rt == rd) and_reg64_reg64(rd, rs); else { mov_reg64_reg64(rd, rs); and_reg64_reg64(rd, rt); } #endif }
void genmtlo(void) { #if defined(COUNT_INSTR) inc_m32abs(&instr_count[67]); #endif #ifdef INTERPRET_MTLO gencallinterp((unsigned long long)MTLO, 0); #else int _lo = allocate_register_64_w((unsigned long long *)&lo); int rs = allocate_register_64((unsigned long long *)dst->f.r.rs); mov_reg64_reg64(_lo, rs); #endif }
void genmthi(void) { #if defined(COUNT_INSTR) inc_m32abs(&instr_count[65]); #endif #ifdef INTERPRET_MTHI gencallinterp((unsigned long long)MTHI, 0); #else int _hi = allocate_register_64_w((unsigned long long *) &hi); int rs = allocate_register_64((unsigned long long *) dst->f.r.rs); mov_reg64_reg64(_hi, rs); #endif }
void gendaddu(void) { #if defined(COUNT_INSTR) inc_m32rel(&instr_count[90]); #endif #ifdef INTERPRET_DADDU gencallinterp((unsigned long long)cached_interpreter_table.DADDU, 0); #else int rs = allocate_register_64((unsigned long long *)dst->f.r.rs); int rt = allocate_register_64((unsigned long long *)dst->f.r.rt); int rd = allocate_register_64_w((unsigned long long *)dst->f.r.rd); if (rs == rd) add_reg64_reg64(rd, rt); else if (rt == rd) add_reg64_reg64(rd, rs); else { mov_reg64_reg64(rd, rs); add_reg64_reg64(rd, rt); } #endif }
void genmflo(void) { #if defined(COUNT_INSTR) inc_m32rel(&instr_count[66]); #endif #ifdef INTERPRET_MFLO gencallinterp((unsigned long long)cached_interpreter_table.MFLO, 0); #else int rd = allocate_register_64_w((unsigned long long *) dst->f.r.rd); int _lo = allocate_register_64((unsigned long long *) &lo); mov_reg64_reg64(rd, _lo); #endif }
void gendsra(void) { #if defined(COUNT_INSTR) inc_m32abs(&instr_count[95]); #endif #ifdef INTERPRET_DSRA gencallinterp((unsigned long long)DSRA, 0); #else int rt = allocate_register_64((unsigned long long *)dst->f.r.rt); int rd = allocate_register_64_w((unsigned long long *)dst->f.r.rd); mov_reg64_reg64(rd, rt); sar_reg64_imm8(rd, dst->f.r.sa); #endif }
void gendsrl(void) { #if defined(COUNT_INSTR) inc_m32rel(&instr_count[94]); #endif #ifdef INTERPRET_DSRL gencallinterp((unsigned long long)cached_interpreter_table.DSRL, 0); #else int rt = allocate_register_64((unsigned long long *)dst->f.r.rt); int rd = allocate_register_64_w((unsigned long long *)dst->f.r.rd); mov_reg64_reg64(rd, rt); shr_reg64_imm8(rd, dst->f.r.sa); #endif }
void genbgez_test(void) { int rs_64bit = is64((unsigned int *)dst->f.i.rs); if (rs_64bit == 0) { int rs = allocate_register_32((unsigned int *)dst->f.i.rs); cmp_reg32_imm32(rs, 0); setge_m8rel((unsigned char *) &branch_taken); } else if (rs_64bit == -1) { cmp_m32rel_imm32(((unsigned int *)dst->f.i.rs)+1, 0); setge_m8rel((unsigned char *) &branch_taken); } else { int rs = allocate_register_64((unsigned long long *)dst->f.i.rs); cmp_reg64_imm8(rs, 0); setge_m8rel((unsigned char *) &branch_taken); } }