/* AMD Family10 machine check */ enum mcheck_type amd_f10_mcheck_init(struct cpuinfo_x86 *c) { enum mcequirk_amd_flags quirkflag = mcequirk_lookup_amd_quirkdata(c); if (amd_k8_mcheck_init(c) == mcheck_none) return mcheck_none; if (quirkflag == MCEQUIRK_F10_GART) mcequirk_amd_apply(quirkflag); x86_mce_callback_register(amd_f10_handler); mce_recoverable_register(mc_amd_recoverable_scan); mce_register_addrcheck(mc_amd_addrcheck); return mcheck_amd_famXX; }
static enum mcheck_type amd_mcheck_init(struct cpuinfo_x86 *ci) { enum mcheck_type rc = mcheck_none; switch (ci->x86) { case 6: rc = amd_k7_mcheck_init(ci); break; default: /* Assume that machine check support is available. * The minimum provided support is at least the K8. */ case 0xf: rc = amd_k8_mcheck_init(ci); break; case 0x10 ... 0x17: rc = amd_f10_mcheck_init(ci); break; } return rc; }