uint32_t app_uart_init(const app_uart_comm_params_t * p_comm_params,
app_uart_buffers_t * p_buffers,
app_uart_event_handler_t event_handler,
app_irq_priority_t irq_priority)
{
uint32_t err_code;
m_event_handler = event_handler;
if (p_buffers == NULL)
{
return NRF_ERROR_INVALID_PARAM;
}
// Configure buffer RX buffer.
err_code = app_fifo_init(&m_rx_fifo, p_buffers->rx_buf, p_buffers->rx_buf_size);
VERIFY_SUCCESS(err_code);
// Configure buffer TX buffer.
err_code = app_fifo_init(&m_tx_fifo, p_buffers->tx_buf, p_buffers->tx_buf_size);
VERIFY_SUCCESS(err_code);
nrf_drv_uart_config_t config = NRF_DRV_UART_DEFAULT_CONFIG;
config.baudrate = (nrf_uart_baudrate_t)p_comm_params->baud_rate;
config.hwfc = (p_comm_params->flow_control == APP_UART_FLOW_CONTROL_DISABLED) ?
NRF_UART_HWFC_DISABLED : NRF_UART_HWFC_ENABLED;
config.interrupt_priority = irq_priority;
config.parity = p_comm_params->use_parity ? NRF_UART_PARITY_INCLUDED : NRF_UART_PARITY_EXCLUDED;
config.pselcts = p_comm_params->cts_pin_no;
config.pselrts = p_comm_params->rts_pin_no;
config.pselrxd = p_comm_params->rx_pin_no;
config.pseltxd = p_comm_params->tx_pin_no;
err_code = nrf_drv_uart_init(&app_uart_inst, &config, uart_event_handler);
VERIFY_SUCCESS(err_code);
m_rx_ovf = false;
// Turn on receiver if RX pin is connected
if (p_comm_params->rx_pin_no != UART_PIN_DISCONNECTED)
{
#ifdef UARTE_PRESENT
if (!config.use_easy_dma)
#endif
{
nrf_drv_uart_rx_enable(&app_uart_inst);
}
return nrf_drv_uart_rx(&app_uart_inst, rx_buffer,1);
}
else
{
return NRF_SUCCESS;
}
}
uint32_t app_uart_init(const app_uart_comm_params_t * p_comm_params,
app_uart_buffers_t * p_buffers,
app_uart_event_handler_t event_handler,
app_irq_priority_t irq_priority)
{
uint32_t err_code;
m_event_handler = event_handler;
if (p_buffers == NULL)
{
return NRF_ERROR_INVALID_PARAM;
}
// Configure buffer RX buffer.
err_code = app_fifo_init(&m_rx_fifo, p_buffers->rx_buf, p_buffers->rx_buf_size);
if (err_code != NRF_SUCCESS)
{
// Propagate error code.
return err_code;
}
// Configure buffer TX buffer.
err_code = app_fifo_init(&m_tx_fifo, p_buffers->tx_buf, p_buffers->tx_buf_size);
if (err_code != NRF_SUCCESS)
{
// Propagate error code.
return err_code;
}
nrf_drv_uart_config_t config = NRF_DRV_UART_DEFAULT_CONFIG;
config.baudrate = (nrf_uart_baudrate_t)p_comm_params->baud_rate;
config.hwfc = (p_comm_params->flow_control == APP_UART_FLOW_CONTROL_DISABLED) ?
NRF_UART_HWFC_DISABLED : NRF_UART_HWFC_ENABLED;
config.interrupt_priority = irq_priority;
config.parity = p_comm_params->use_parity ? NRF_UART_PARITY_INCLUDED : NRF_UART_PARITY_EXCLUDED;
config.pselcts = p_comm_params->cts_pin_no;
config.pselrts = p_comm_params->rts_pin_no;
config.pselrxd = p_comm_params->rx_pin_no;
config.pseltxd = p_comm_params->tx_pin_no;
err_code = nrf_drv_uart_init(&config, uart_event_handler);
if (err_code != NRF_SUCCESS)
{
return err_code;
}
nrf_drv_uart_rx_enable();
return nrf_drv_uart_rx(rx_buffer,1);
}
ret_code_t nrf_drv_rng_init(nrf_drv_rng_config_t const * p_config)
{
uint32_t result;
if (m_rng_cb.state == NRF_DRV_STATE_UNINITIALIZED)
{
#ifndef SOFTDEVICE_PRESENT
result = app_fifo_init(&m_rng_cb.rand_pool, m_rng_cb.buffer, RNG_CONFIG_POOL_SIZE);
if (p_config == NULL)
{
p_config = &m_default_config;
}
if (result == NRF_SUCCESS)
{
if (p_config->error_correction)
{
nrf_rng_error_correction_enable();
}
nrf_drv_common_irq_enable(RNG_IRQn, p_config->interrupt_priority);
nrf_rng_shorts_disable(NRF_RNG_SHORT_VALRDY_STOP_MASK);
rng_start();
m_rng_cb.state = NRF_DRV_STATE_INITIALIZED;
}
#else
UNUSED_VARIABLE(p_config);
uint8_t softdevice_is_enabled;
result = sd_softdevice_is_enabled(&softdevice_is_enabled);
if (softdevice_is_enabled)
{
m_rng_cb.state = NRF_DRV_STATE_INITIALIZED;
}
else
{
result = NRF_ERROR_SOFTDEVICE_NOT_ENABLED;
}
#endif // SOFTDEVICE_PRESENT
}
else
{
result = NRF_ERROR_INVALID_STATE;
}
return result;
}
uint32_t app_uart_init(const app_uart_comm_params_t * p_comm_params,
app_uart_buffers_t * p_buffers,
app_uart_event_handler_t event_handler,
app_irq_priority_t irq_priority,
uint16_t * p_app_uart_uid)
{
uint32_t err_code;
m_current_state = UART_OFF;
m_event_handler = event_handler;
if (p_buffers == NULL)
{
return NRF_ERROR_INVALID_PARAM;
}
// Configure buffer RX buffer.
err_code = app_fifo_init(&m_rx_fifo, p_buffers->rx_buf, p_buffers->rx_buf_size);
if (err_code != NRF_SUCCESS)
{
// Propagate error code.
return err_code;
}
// Configure buffer TX buffer.
err_code = app_fifo_init(&m_tx_fifo, p_buffers->tx_buf, p_buffers->tx_buf_size);
if (err_code != NRF_SUCCESS)
{
// Propagate error code.
return err_code;
}
// Configure RX and TX pins.
nrf_gpio_cfg_output(p_comm_params->tx_pin_no);
nrf_gpio_cfg_input(p_comm_params->rx_pin_no, NRF_GPIO_PIN_NOPULL);
NRF_UART0->PSELTXD = p_comm_params->tx_pin_no;
NRF_UART0->PSELRXD = p_comm_params->rx_pin_no;
// Configure baud rate and parity.
NRF_UART0->BAUDRATE = (p_comm_params->baud_rate << UART_BAUDRATE_BAUDRATE_Pos);
if (p_comm_params->use_parity)
{
NRF_UART0->CONFIG = (UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos);
}
else
{
NRF_UART0->CONFIG = (UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos);
}
if (p_comm_params->flow_control == APP_UART_FLOW_CONTROL_LOW_POWER)
{
if (!nrf_drv_gpiote_is_init())
{
err_code = nrf_drv_gpiote_init();
if (err_code != NRF_SUCCESS)
{
return err_code;
}
}
// Configure hardware flow control.
nrf_drv_gpiote_out_config_t rts_config = GPIOTE_CONFIG_OUT_SIMPLE(true);
err_code = nrf_drv_gpiote_out_init(p_comm_params->rts_pin_no, &rts_config);
if (err_code != NRF_SUCCESS)
{
return err_code;
}
NRF_UART0->PSELCTS = UART_PIN_DISCONNECTED;
NRF_UART0->PSELRTS = p_comm_params->rts_pin_no;
NRF_UART0->CONFIG |= (UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos);
// Setup the gpiote to handle pin events on cts-pin.
// For the UART we want to detect both low->high and high->low transitions in order to
// know when to activate/de-activate the TX/RX in the UART.
// Configure pin.
nrf_drv_gpiote_in_config_t cts_config = GPIOTE_CONFIG_IN_SENSE_TOGGLE(false);
err_code = nrf_drv_gpiote_in_init(p_comm_params->cts_pin_no, &cts_config, gpiote_uart_event_handler);
if (err_code != NRF_SUCCESS)
{
return err_code;
}
nrf_drv_gpiote_in_event_enable(p_comm_params->cts_pin_no, true);
// UART CTS pin is active when low.
if (nrf_drv_gpiote_in_is_set(p_comm_params->cts_pin_no))
{
on_uart_event(ON_CTS_HIGH);
}
else
{
on_uart_event(ON_CTS_LOW);
}
}
else if (p_comm_params->flow_control == APP_UART_FLOW_CONTROL_ENABLED)
{
uart_standard_flow_control_init(p_comm_params);
m_current_state = UART_READY;
}
else
{
uart_no_flow_control_init();
m_current_state = UART_READY;
}
if (*p_app_uart_uid == UART_INSTANCE_ID_INVALID)
{
*p_app_uart_uid = m_instance_counter++;
}
// Enable UART interrupt
NRF_UART0->INTENCLR = 0xffffffffUL;
NRF_UART0->INTENSET = (UART_INTENSET_RXDRDY_Set << UART_INTENSET_RXDRDY_Pos) |
(UART_INTENSET_TXDRDY_Set << UART_INTENSET_TXDRDY_Pos) |
(UART_INTENSET_ERROR_Set << UART_INTENSET_ERROR_Pos);
NVIC_ClearPendingIRQ(UART0_IRQn);
NVIC_SetPriority(UART0_IRQn, irq_priority);
NVIC_EnableIRQ(UART0_IRQn);
return NRF_SUCCESS;
}
uint32_t app_uart_init(const app_uart_comm_params_t * p_comm_params,
app_uart_buffers_t * p_buffers,
app_uart_event_handler_t event_handler,
app_irq_priority_t irq_priority)
{
uint32_t err_code;
uint32_t gpiote_high_pins;
uint32_t gpiote_pin_low_high_mask = 0;
uint32_t gpiote_pin_high_low_mask = 0;
m_current_state = UART_OFF;
m_event_handler = event_handler;
// Configure buffer RX buffer.
err_code = app_fifo_init(&m_rx_fifo, p_buffers->rx_buf, p_buffers->rx_buf_size);
if (err_code != NRF_SUCCESS)
{
// Propagate error code.
return err_code;
}
// Configure buffer TX buffer.
err_code = app_fifo_init(&m_tx_fifo, p_buffers->tx_buf, p_buffers->tx_buf_size);
if (err_code != NRF_SUCCESS)
{
// Propagate error code.
return err_code;
}
// Configure RX and TX pins.
nrf_gpio_cfg_output(p_comm_params->tx_pin_no);
nrf_gpio_cfg_input(p_comm_params->rx_pin_no, NRF_GPIO_PIN_NOPULL);
NRF_UART0->PSELTXD = p_comm_params->tx_pin_no;
NRF_UART0->PSELRXD = p_comm_params->rx_pin_no;
// Configure baud rate and parity.
NRF_UART0->BAUDRATE = (p_comm_params->baud_rate << UART_BAUDRATE_BAUDRATE_Pos);
if (p_comm_params->use_parity)
{
NRF_UART0->CONFIG = (UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos);
}
else
{
NRF_UART0->CONFIG = (UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos);
}
if (p_comm_params->use_hardware_flow_control)
{
// Configure hardware flow control.
nrf_gpio_cfg_output(p_comm_params->rts_pin_no);
NRF_GPIO->OUT = 1 << p_comm_params->rts_pin_no;
NRF_UART0->PSELCTS = UART_PIN_DISCONNECTED;
NRF_UART0->PSELRTS = p_comm_params->rts_pin_no;
NRF_UART0->CONFIG |= (UART_CONFIG_HWFC_Enabled << UART_CONFIG_HWFC_Pos);
// Setup the gpiote to handle pin events on cts-pin.
// For the UART we want to detect both low->high and high->low transistions in order to
// know when to activate/deactivate the TX/RX in the UART.
// Configure pin.
m_pin_cts_mask = (1 << p_comm_params->cts_pin_no);
GPIO_PIN_CONFIG(p_comm_params->cts_pin_no,
GPIO_PIN_CNF_DIR_Input,
GPIO_PIN_CNF_INPUT_Connect,
GPIO_PIN_CNF_PULL_Disabled,
GPIO_PIN_CNF_DRIVE_S0S1,
GPIO_PIN_CNF_SENSE_Low);
gpiote_pin_low_high_mask = (1 << p_comm_params->cts_pin_no);
gpiote_pin_high_low_mask = (1 << p_comm_params->cts_pin_no);
err_code = app_gpiote_user_register(&m_gpiote_uid,
gpiote_pin_low_high_mask,
gpiote_pin_high_low_mask,
gpiote_uart_event_handler);
if (err_code != NRF_SUCCESS)
{
return err_code;
}
err_code = app_gpiote_pins_state_get(m_gpiote_uid, &gpiote_high_pins);
if (err_code != NRF_SUCCESS)
{
return err_code;
}
err_code = app_gpiote_user_enable(m_gpiote_uid);
if (err_code != NRF_SUCCESS)
{
return err_code;
}
// UART CTS pin is active when low.
if ((gpiote_high_pins & (1 << p_comm_params->cts_pin_no)) == 0)
{
on_uart_event(ON_CTS_LOW);
}
else
{
on_uart_event(ON_CTS_HIGH);
}
}
else
{
uart_no_flow_control_init();
m_current_state = UART_READY;
}
// Enable UART interrupt
NRF_UART0->INTENCLR = 0xffffffffUL;
NRF_UART0->INTENSET = (UART_INTENSET_RXDRDY_Set << UART_INTENSET_RXDRDY_Pos) |
(UART_INTENSET_TXDRDY_Set << UART_INTENSET_TXDRDY_Pos) |
(UART_INTENSET_ERROR_Set << UART_INTENSET_ERROR_Pos);
NVIC_ClearPendingIRQ(UART0_IRQn);
NVIC_SetPriority(UART0_IRQn, irq_priority);
NVIC_EnableIRQ(UART0_IRQn);
return NRF_SUCCESS;
}
uint32_t app_uart_init(const app_uart_comm_params_t * p_comm_params,
app_uart_buffers_t * p_buffers,
app_uart_event_handler_t event_handler,
app_irq_priority_t irq_priority,
uint16_t * p_app_uart_uid)
{
uint32_t err_code;
m_current_state = UART_OFF;
m_event_handler = event_handler;
if (p_buffers == NULL)
{
return NRF_ERROR_INVALID_PARAM;
}
// Configure buffer RX buffer.
err_code = app_fifo_init(&m_rx_fifo, p_buffers->rx_buf, p_buffers->rx_buf_size);
if (err_code != NRF_SUCCESS)
{
// Propagate error code.
return err_code;
}
// Configure buffer TX buffer.
err_code = app_fifo_init(&m_tx_fifo, p_buffers->tx_buf, p_buffers->tx_buf_size);
if (err_code != NRF_SUCCESS)
{
// Propagate error code.
return err_code;
}
// Configure RX and TX pins.
nrf_gpio_cfg_output(p_comm_params->tx_pin_no);
nrf_gpio_cfg_input(p_comm_params->rx_pin_no, NRF_GPIO_PIN_NOPULL);
NRF_UART0->PSELTXD = p_comm_params->tx_pin_no;
NRF_UART0->PSELRXD = p_comm_params->rx_pin_no;
// Configure baud rate and parity.
NRF_UART0->BAUDRATE = (p_comm_params->baud_rate << UART_BAUDRATE_BAUDRATE_Pos);
if (p_comm_params->use_parity)
{
NRF_UART0->CONFIG = (UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos);
}
else
{
NRF_UART0->CONFIG = (UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos);
}
uart_no_flow_control_init();
m_current_state = UART_READY;
// Enable UART interrupt
NRF_UART0->INTENCLR = 0xffffffffUL;
NRF_UART0->INTENSET = (UART_INTENSET_RXDRDY_Set << UART_INTENSET_RXDRDY_Pos) |
(UART_INTENSET_TXDRDY_Set << UART_INTENSET_TXDRDY_Pos) |
(UART_INTENSET_ERROR_Set << UART_INTENSET_ERROR_Pos);
NVIC_ClearPendingIRQ(UART0_IRQn);
NVIC_SetPriority(UART0_IRQn, irq_priority);
NVIC_EnableIRQ(UART0_IRQn);
return NRF_SUCCESS;
}
