uint32_t *arm_decodeirq(uint32_t *regs)
{
uint32_t regval;
int irq;
/* Read the interrupt acknowledge register and get the interrupt ID */
regval = getreg32(GIC_ICCIAR);
irq = (regval & GIC_ICCIAR_INTID_MASK) >> GIC_ICCIAR_INTID_SHIFT;
gicllvdbg("irq=%d\n", irq);
/* Ignore spurions IRQs. ICCIAR will report 1023 if there is no pending
* interrupt.
*/
DEBUGASSERT(irq < NR_IRQS || irq == 1023);
if (irq < NR_IRQS)
{
/* Dispatch the interrupt */
regs = arm_doirq(irq, regs);
}
/* Write to the end-of-interrupt register */
putreg32(regval, GIC_ICCEOIR);
return regs;
}
uint32_t *arm_decodefiq(FAR uint32_t *regs)
{
int vector;
/* Check for a VRAM parity error.
*
* REVISIT: This is not to critical in this implementation since VIM RAM
* is not used.
*/
/* Get the interrupting vector number from the FIQINDEX register. Zero,
* the "phantom" vector will returned.
*/
vector = getreg32(TMS570_VIM_FIQINDEX) & VIM_FIQINDEX_MASK;
if (vector > 0)
{
/* Dispatch the interrupt. NOTE that the IRQ number is the vector
* number offset by one to skip over the "phantom" vector.
*/
regs = arm_doirq(vector - 1, regs);
}
return regs;
}
