static int disassemble(RAsm *a, RAsmOp *op, const ut8 *buf, int len) {
ut8 buf2[4];
struct arm_insn *arminsn = arm_new();
arm_set_pc (arminsn, a->pc);
arm_set_thumb (arminsn, a->bits == 16);
if (a->big_endian && a->bits == 32) {
r_mem_copyendian (buf2, buf, 4, 0);
arm_set_input_buffer (arminsn, buf2);
} else {
arm_set_input_buffer (arminsn, buf);
}
op->size = arm_disasm_one_insn (arminsn);
strncpy (op->buf_asm, arm_insn_asm (arminsn), R_ASM_BUFSIZE);
strncpy (op->buf_hex, arm_insn_hex (arminsn), R_ASM_BUFSIZE);
arm_free (arminsn);
return op->size;
}
static
void sarm_setup_cpu (simarm_t *sim, ini_sct_t *ini)
{
ini_sct_t *sct;
const char *model;
unsigned long id;
sct = ini_next_sct (ini, NULL, "cpu");
ini_get_string (sct, "model", &model, "armv5");
ini_get_bool (sct, "bigendian", &sim->bigendian, 1);
if (strcmp (model, "xscale") == 0) {
id = 0x69052000;
}
else if (strcmp (model, "ixp2400") == 0) {
id = 0x69054190;
}
else {
id = 0x69054190;
}
ini_get_uint32 (sct, "id", &id, id);
pce_log_tag (MSG_INF, "CPU:", "model=%s id=0x%08lx endian=%s\n",
model, id, sim->bigendian ? "big" : "little"
);
sim->cpu = arm_new();
if (sim->cpu == NULL) {
return;
}
arm_set_flags (sim->cpu, ARM_FLAG_XSCALE, 1);
arm_set_flags (sim->cpu, ARM_FLAG_BIGENDIAN, sim->bigendian);
arm_set_id (sim->cpu, id);
if (sim->bigendian) {
arm_set_mem_fct (sim->cpu, sim->mem,
&mem_get_uint8,
&mem_get_uint16_be,
&mem_get_uint32_be,
&mem_set_uint8,
&mem_set_uint16_be,
&mem_set_uint32_be
);
}
else {
arm_set_mem_fct (sim->cpu, sim->mem,
&mem_get_uint8,
&mem_get_uint16_le,
&mem_get_uint32_le,
&mem_set_uint8,
&mem_set_uint16_le,
&mem_set_uint32_le
);
}
if (sim->ram != NULL) {
arm_set_ram (sim->cpu, mem_blk_get_data (sim->ram), mem_blk_get_size (sim->ram));
}
}
