static void hposn(void) {
unsigned char msktbl[]={0x81,0x82,0x84,0x88,0x90,0xA0,0xC0};
// F411
ram[HGR_Y]=a;
ram[HGR_X]=x;
ram[HGR_X+1]=y;
pha();
a=a&0xC0;
ram[GBASL]=a;
lsr();
lsr();
a=a|ram[GBASL];
ram[GBASL]=a;
pla();
// F423
ram[GBASH]=a;
asl();
asl();
asl();
rol_mem(GBASH);
asl();
rol_mem(GBASH);
asl();
ror_mem(GBASL);
lda(GBASH);
a=a&0x1f;
a=a|ram[HGR_PAGE];
ram[GBASH]=a;
// F438
a=x;
cpy(0);
if (z==1) goto hposn_2;
y=35;
adc(4);
hposn_1:
iny();
// f442
hposn_2:
sbc(7);
if (c==1) goto hposn_1;
ram[HGR_HORIZ]=y;
x=a;
a=msktbl[(x-0x100)+7]; // LDA MSKTBL-$100+7,X BIT MASK
// MSKTBL=F5B8
ram[HMASK]=a;
a=y;
lsr();
a=ram[HGR_COLOR];
ram[HGR_BITS]=a;
if (c) color_shift();
}
static char * ASL1() {
//Accumulator addressing mode
CPU *c = getCPU();
int8_t operand = 0xFF;
OP_CODE_INFO *o = getOP_CODE_INFO(operand,0,modeAccumulator);
asl(c,o);
int8_t accumVal = getRegByte(c,ACCUM);
mu_assert("ASL1 err, ACCUM reg != -2", accumVal == -2);
mu_run_test_with_args(testRegStatus,c,"10100001",
" NVUBDIZC NVUBDIZC\nASL1 err, %s != %s");
freeOP_CODE_INFO(o);
free(c);
return 0;
}
static void color_shift(void) {
// F47E
asl();
cmp(0xc0);
if (!n) goto done_color_shift;
a=ram[HGR_BITS];
a=a^0x7f;
ram[HGR_BITS]=a;
done_color_shift:
; // rts
}
int main (int argc, char ** argv)
{
ULONG a=1,b=2,c=0,d=0;
c=add(a,b);
d=asl(a,b);
Printf((STRPTR)"%ld+%ld=%ld\n",a, b ,c);
Printf((STRPTR)"%ld<<%ld=%ld\n",a, b, d);
Flush (Output ());
return 0;
}
static char * ASL2() {
//Non modeAccumulator addressing mode
CPU *c = getCPU();
int8_t operand = 0xFF;
uint16_t address = 0xEFEF;
OP_CODE_INFO *o = getOP_CODE_INFO(operand,address,modeImmediate);
asl(c,o);
int8_t accumVal = getRegByte(c,ACCUM);
int8_t addrVal = read(c,address);
mu_assert("ASL2 err, ACCUM reg != 0", accumVal == 0);
mu_assert("ASL2 err, Address val != -2", addrVal == -2);
mu_run_test_with_args(testRegStatus,c,"10100001",
" NVUBDIZC NVUBDIZC\nASL2 err, %s != %s");
freeOP_CODE_INFO(o);
free(c);
return 0;
}
static void move_left_or_right(void) {
// F465
if (n==0) goto move_right;
a=ram[HMASK];
lsr();
if (c==1) goto lr_2;
a=a^0xc0;
lr_1:
ram[HMASK]=a;
return;
lr_2:
dey();
if (n==0) goto lr_3;
y=39;
lr_3:
a=0xc0;
lr_4:
ram[HMASK]=a;
ram[HGR_HORIZ]=y;
a=ram[HGR_BITS];
color_shift();
return;
move_right:
a=ram[HMASK];
asl();
a=a^0x80;
if (a&0x80) goto lr_1;
a=0x81;
iny();
cpy(40);
if (c==0) goto lr_4;
y=0;
goto lr_4;
}
int main(int argc, char **argv) {
int yy;
grsim_init();
gr();
yy=0;
printf("****yy=%d\n",yy);
y=yy; // ldy #0
x=3; // ldx #3
L1:
ram[0x3c]=x; // stx $3c
a=x; // txa
asl(); // asl
bit_mem(0x3c); // bit $3c
if (z==1) goto L3; // beq L3
ora_mem(0x3c); // ora $3c
eor(0xff); // eor #$ff
and(0x7e); // and #$7e
L2:
if (c==1) goto L3; // bcs L3
lsr(); // lsr
if (z==0) goto L2; // bne L2
a=y; // tya
printf("%x=%x\n",x,a); // sta nibtbl, x
y++; // iny
L3:
x++; // inx
if (!(x&0x80)) goto L1; // bpl L1
return 0;
}
void execALU(){
switch(controle_alu.op_code){
case 1: add(); break;
case 2: addinc(); break;
case 3: and(); break;
case 4: andnota(); break;
case 5: asl(); break;
case 6: asr(); break;
case 7: deca(); break;
case 8: inca(); break;
case 9: j(); break;
case 10: jal(); break;
case 11: jf(); break;
case 12: jr(); break;
case 13: jt(); break;
case 14: lch(); break;
case 15: lcl(); break;
case 16: load(); break;
case 17: loadlit(); break;
case 18: lsl(); break;
case 19: lsr(); break;
case 20: nand(); break;
case 21: nor(); break;
case 22: ones(); break;
case 23: or(); break;
case 24: ornotb(); break;
case 25: passa(); break;
case 26: passnota(); break;
case 27: store(); break;
case 28: sub(); break;
case 29: subdec(); break;
case 30: xnor(); break;
case 31: xor(); break;
case 32: zeros(); break;
}
}
static void hglin(void) {
// F53A
pha();
c=1;
sbc(ram[HGR_X]);
pha();
a=x;
sbc(ram[HGR_X+1]);
ram[HGR_QUADRANT]=a;
// F544
if (c==1) goto hglin_1;
pla();
a=a^0xff;
adc(1);
pha();
lda_const(0);
sbc(ram[HGR_QUADRANT]);
// F550
hglin_1:
ram[HGR_DX+1]=a;
ram[HGR_E+1]=a;
pla();
ram[HGR_DX]=a;
ram[HGR_E]=a;
pla();
ram[HGR_X]=a;
ram[HGR_X+1]=x;
a=y;
c=0;
sbc(ram[HGR_Y]);
if (c==0) goto hglin_2;
a=a^0xff;
adc(0xfe);
hglin_2:
// F568
ram[HGR_DY]=a;
ram[HGR_Y]=y;
ror_mem(HGR_QUADRANT);
c=1;
sbc(ram[HGR_DX]);
x=a;
lda_const(0xff);
sbc(ram[HGR_DX+1]);
ram[HGR_COUNT]=a;
ldy(HGR_HORIZ);
goto movex2; // always?
// f57c
movex:
asl();
move_left_or_right();
c=1;
// f581
movex2:
lda(HGR_E);
adc(ram[HGR_DY]);
ram[HGR_E]=a;
lda(HGR_E+1);
sbc(0);
movex2_1:
ram[HGR_E+1]=a;
lda(y_indirect(GBASL,y));
a=a^ram[HGR_BITS];
a=a&ram[HMASK];
a=a^ram[y_indirect(GBASL,y)];
ram[y_indirect(GBASL,y)]=a;
inx();
if (z!=1) goto movex2_2;
ram[HGR_COUNT]++;
if (ram[HGR_COUNT]==0) return;
// F59e
movex2_2:
lda(HGR_QUADRANT);
if (c==1) goto movex;
move_up_or_down();
c=0;
lda(HGR_E);
adc(ram[HGR_DX]);
ram[HGR_E]=a;
lda(HGR_E+1);
adc(ram[HGR_DX+1]);
goto movex2_1;
}
/* http://codebase64.org/doku.php?id=base:small_fast_16-bit_prng */
unsigned short random16(void) {
path=0;
path|=PATH_R16;
lda(SEEDL); cycles+=3;
if (a==0) {
cycles+=3;
goto low_zero;
}
cycles+=2;
//lownz:
path|=PATH_LNZ;
asl_mem(SEEDL); cycles+=5;
lda(SEEDH); cycles+=3;
rol(); cycles+=2;
if (c==1) {
cycles+=3;
goto five_cycle_do_eor;
}
cycles+=2;
if (c==0) {
cycles+=3;
goto two_cycle_no_eor;
}
fprintf(stderr,"CAN'T HAPPEN\n");
eleven_cycle_do_eor:
cycles+=6;
five_cycle_do_eor:
cycles+=2;
three_cycle_do_eor:
sta(SEEDH); cycles+=3;
//do_eor:
path|=PATH_DEO;
a=a^0x76; cycles+=2;
sta(SEEDH); cycles+=3;
lda(SEEDL); cycles+=3;
a=a^0x57; cycles+=2;
sta(SEEDL); cycles+=3;
eor_rts:
cycles+=6;
return ((ram[SEEDH]<<8)|ram[SEEDL]);
six_cycles_no_eor:
cycles+=2;
four_cycle_no_eor:
cycles+=2;
two_cycle_no_eor:
cycles+=2;
//no_eor:
cycles+=2;
path|=PATH_NEO;
cycles+=6;
sta(SEEDH); cycles+=3;
cycles+=3;
goto eor_rts;
low_zero:
path|=PATH_LOZ;
lda(SEEDH); cycles+=3;
if (a==0) {
cycles+=3;
goto eleven_cycle_do_eor;
}
cycles+=2;
//ceo:
path|=PATH_CEO;
asl(); cycles+=2;
if (a==0) {
cycles+=3;
goto six_cycles_no_eor;
}
cycles+=2;
//cep:
path|=PATH_CEP;
if (c==0) {
cycles+=3;
goto four_cycle_no_eor;
}
cycles+=2;
if (c==1) {
cycles+=3;
goto three_cycle_do_eor;
}
cycles+=2;
return 0;
}
