static void ast_get_ahb_freq(void)
{
static const uint32_t cpu_freqs_24_48[] = {
384000000,
360000000,
336000000,
408000000
};
static const uint32_t cpu_freqs_25[] = {
400000000,
375000000,
350000000,
425000000
};
static const uint32_t ahb_div[] = { 1, 2, 4, 3 };
uint32_t strap, cpu_clk, div;
if (ast_ahb_freq)
return;
/* HW strapping gives us the CPU freq and AHB divisor */
strap = ast_ahb_readl(SCU_HW_STRAPPING);
if (strap & 0x00800000) {
FL_DBG("AST: CLKIN 25Mhz\n");
cpu_clk = cpu_freqs_25[(strap >> 8) & 3];
} else {
static int ast_sf_set_4b(struct spi_flash_ctrl *ctrl, bool enable)
{
struct ast_sf_ctrl *ct = container_of(ctrl, struct ast_sf_ctrl, ops);
uint32_t ce_ctrl = 0;
if (ct->type == AST_SF_TYPE_BMC && ct->ops.finfo->size > 0x1000000)
ce_ctrl = ast_ahb_readl(BMC_SPI_FCTL_CE_CTRL);
else if (ct->type != AST_SF_TYPE_PNOR)
return enable ? FLASH_ERR_4B_NOT_SUPPORTED : 0;
/*
* We update the "old" value as well since when quitting
* we don't restore the mode of the flash itself so we need
* to leave the controller in a compatible setup
*/
if (enable) {
ct->ctl_val |= 0x2000;
ct->ctl_read_val |= 0x2000;
ce_ctrl |= 0x1;
} else {
ct->ctl_val &= ~0x2000;
ct->ctl_read_val &= ~0x2000;
ce_ctrl &= ~0x1;
}
ct->mode_4b = enable;
/* Update read mode */
ast_ahb_writel(ct->ctl_read_val, ct->ctl_reg);
if (ce_ctrl && ct->type == AST_SF_TYPE_BMC)
ast_ahb_writel(ce_ctrl, BMC_SPI_FCTL_CE_CTRL);
return 0;
}
/* * These accesses will only work if the BMC address 0x1E6E2180 is set * to 0x7B, which is its default state on current systems. In future, * for security purposes it is proposed to configure this register to * disallow accesses from the host, and provide the properties that * the Linux ast VGA driver used through the device tree instead. * Here we set those properties so we can test how things would work * if the window into BMC memory was closed. * * If both the petitboot kernel and the host kernel have an ast driver * that reads properties from the device tree, setting 0x1E6E2180 to * 0x79 will disable the backdoor into BMC memory and the only way the * ast driver can operate is using the device tree properties. */ revision = ast_ahb_readl(SCU_REVISION_ID); mcr_configuration = ast_ahb_readl(MCR_CONFIGURATION); mcr_scu_mpll = ast_ahb_readl(MCR_SCU_MPLL); mcr_scu_strap = ast_ahb_readl(MCR_SCU_STRAP); dt_add_property_cells(np, "aspeed,scu-revision-id", revision); dt_add_property_cells(np, "aspeed,mcr-configuration", mcr_configuration); dt_add_property_cells(np, "aspeed,mcr-scu-mpll", mcr_scu_mpll); dt_add_property_cells(np, "aspeed,mcr-scu-strap", mcr_scu_strap); /* * if * - the petitboot kernel supports an ast driver that uses DT * - every host kernel supports an ast driver that uses DT * - the host can't flash unsigned skiboots * * then enabling the line below will allow the host and the BMC to be
