Esempio n. 1
0
/*
 * Set current time and date in RTC
 */
static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
{
    unsigned long cr;

    dev_dbg(dev, "%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
            1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
            tm->tm_hour, tm->tm_min, tm->tm_sec);

    /* Stop Time/Calendar from counting */
    cr = at91_rtc_read(AT91_RTC_CR);
    at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM);

    at91_rtc_write_ier(AT91_RTC_ACKUPD);
    wait_for_completion(&at91_rtc_updated);	/* wait for ACKUPD interrupt */
    at91_rtc_write_idr(AT91_RTC_ACKUPD);

    at91_rtc_write(AT91_RTC_TIMR,
                   bin2bcd(tm->tm_sec) << 0
                   | bin2bcd(tm->tm_min) << 8
                   | bin2bcd(tm->tm_hour) << 16);

    at91_rtc_write(AT91_RTC_CALR,
                   bin2bcd((tm->tm_year + 1900) / 100)	/* century */
                   | bin2bcd(tm->tm_year % 100) << 8	/* year */
                   | bin2bcd(tm->tm_mon + 1) << 16		/* tm_mon starts at zero */
                   | bin2bcd(tm->tm_wday + 1) << 21	/* day of the week [0-6], Sunday=0 */
                   | bin2bcd(tm->tm_mday) << 24);

    /* Restart Time/Calendar */
    cr = at91_rtc_read(AT91_RTC_CR);
    at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM));

    return 0;
}
/*
 * Set alarm time and date in RTC
 */
static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time tm;

	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm);

	at91_alarm_year = tm.tm_year;

	tm.tm_hour = alrm->time.tm_hour;
	tm.tm_min = alrm->time.tm_min;
	tm.tm_sec = alrm->time.tm_sec;

	at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM);
	at91_rtc_write(AT91_RTC_TIMALR,
		  bin2bcd(tm.tm_sec) << 0
		| bin2bcd(tm.tm_min) << 8
		| bin2bcd(tm.tm_hour) << 16
		| AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN);
	at91_rtc_write(AT91_RTC_CALALR,
		  bin2bcd(tm.tm_mon + 1) << 16		/* tm_mon starts at zero */
		| bin2bcd(tm.tm_mday) << 24
		| AT91_RTC_DATEEN | AT91_RTC_MTHEN);

	if (alrm->enabled) {
		at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
		at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM);
	}

	pr_debug("%s(): %4d-%02d-%02d %02d:%02d:%02d\n", __func__,
		at91_alarm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour,
		tm.tm_min, tm.tm_sec);

	return 0;
}
Esempio n. 3
0
/*
 * Initialize and install RTC driver
 */
static int __init at91_rtc_probe(struct platform_device *pdev)
{
	struct rtc_device *rtc;
	struct resource *regs;
	int ret = 0;

	at91_rtc_config = at91_rtc_get_config(pdev);
	if (!at91_rtc_config)
		return -ENODEV;

	regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	if (!regs) {
		dev_err(&pdev->dev, "no mmio resource defined\n");
		return -ENXIO;
	}

	irq = platform_get_irq(pdev, 0);
	if (irq < 0) {
		dev_err(&pdev->dev, "no irq resource defined\n");
		return -ENXIO;
	}

	at91_rtc_regs = devm_ioremap(&pdev->dev, regs->start,
				     resource_size(regs));
	if (!at91_rtc_regs) {
		dev_err(&pdev->dev, "failed to map registers, aborting.\n");
		return -ENOMEM;
	}

	at91_rtc_write(AT91_RTC_CR, 0);
	at91_rtc_write(AT91_RTC_MR, 0);		/* 24 hour mode */

	/* Disable all interrupts */
	at91_rtc_write_idr(AT91_RTC_ACKUPD | AT91_RTC_ALARM |
					AT91_RTC_SECEV | AT91_RTC_TIMEV |
					AT91_RTC_CALEV);

	ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt,
				IRQF_SHARED,
				"at91_rtc", pdev);
	if (ret) {
		dev_err(&pdev->dev, "IRQ %d already in use.\n", irq);
		return ret;
	}

	/* cpu init code should really have flagged this device as
	 * being wake-capable; if it didn't, do that here.
	 */
	if (!device_can_wakeup(&pdev->dev))
		device_init_wakeup(&pdev->dev, 1);

	rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
				&at91_rtc_ops, THIS_MODULE);
	if (IS_ERR(rtc))
		return PTR_ERR(rtc);
	platform_set_drvdata(pdev, rtc);

	dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n");
	return 0;
}
Esempio n. 4
0
/*
 * Set alarm time and date in RTC
 */
static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
{
	struct rtc_time tm;

	at91_rtc_decodetime(AT91_RTC_TIMR, AT91_RTC_CALR, &tm);

	tm.tm_mon = alrm->time.tm_mon;
	tm.tm_mday = alrm->time.tm_mday;
	tm.tm_hour = alrm->time.tm_hour;
	tm.tm_min = alrm->time.tm_min;
	tm.tm_sec = alrm->time.tm_sec;

	at91_rtc_write_idr(AT91_RTC_ALARM);
	at91_rtc_write(AT91_RTC_TIMALR,
		  bin2bcd(tm.tm_sec) << 0
		| bin2bcd(tm.tm_min) << 8
		| bin2bcd(tm.tm_hour) << 16
		| AT91_RTC_HOUREN | AT91_RTC_MINEN | AT91_RTC_SECEN);
	at91_rtc_write(AT91_RTC_CALALR,
		  bin2bcd(tm.tm_mon + 1) << 16		/* tm_mon starts at zero */
		| bin2bcd(tm.tm_mday) << 24
		| AT91_RTC_DATEEN | AT91_RTC_MTHEN);

	if (alrm->enabled) {
		at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
		at91_rtc_write_ier(AT91_RTC_ALARM);
	}

	dev_dbg(dev, "%s(): %ptR\n", __func__, &tm);

	return 0;
}
static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
	pr_debug("%s(): cmd=%08x\n", __func__, enabled);

	if (enabled) {
		at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
		at91_rtc_write(AT91_RTC_IER, AT91_RTC_ALARM);
	} else
		at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ALARM);

	return 0;
}
Esempio n. 6
0
static void at91_rtc_shutdown(struct platform_device *pdev)
{
    /* Disable all interrupts */
    at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
                   AT91_RTC_SECEV | AT91_RTC_TIMEV |
                   AT91_RTC_CALEV);
}
Esempio n. 7
0
/*
 * IRQ handler for the RTC
 */
static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
{
    struct platform_device *pdev = dev_id;
    struct rtc_device *rtc = platform_get_drvdata(pdev);
    unsigned int rtsr;
    unsigned long events = 0;

    rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr();
    if (rtsr) {		/* this interrupt is shared!  Is it ours? */
        if (rtsr & AT91_RTC_ALARM)
            events |= (RTC_AF | RTC_IRQF);
        if (rtsr & AT91_RTC_SECEV)
            events |= (RTC_UF | RTC_IRQF);
        if (rtsr & AT91_RTC_ACKUPD)
            complete(&at91_rtc_updated);

        at91_rtc_write(AT91_RTC_SCCR, rtsr);	/* clear status reg */

        rtc_update_irq(rtc, 1, events);

        dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n", __func__,
                events >> 8, events & 0x000000FF);

        return IRQ_HANDLED;
    }
    return IRQ_NONE;		/* not handled */
}
Esempio n. 8
0
static void at91_rtc_write_ier(u32 mask)
{
    unsigned long flags;

    spin_lock_irqsave(&at91_rtc_lock, flags);
    at91_rtc_shadow_imr |= mask;
    at91_rtc_write(AT91_RTC_IER, mask);
    spin_unlock_irqrestore(&at91_rtc_lock, flags);
}
static int at91_rtc_resume(struct device *dev)
{
	if (at91_rtc_imr) {
		if (device_may_wakeup(dev))
			disable_irq_wake(irq);
		else
			at91_rtc_write(AT91_RTC_IER, at91_rtc_imr);
	}
	return 0;
}
Esempio n. 10
0
static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
{
    dev_dbg(dev, "%s(): cmd=%08x\n", __func__, enabled);

    if (enabled) {
        at91_rtc_write(AT91_RTC_SCCR, AT91_RTC_ALARM);
        at91_rtc_write_ier(AT91_RTC_ALARM);
    } else
        at91_rtc_write_idr(AT91_RTC_ALARM);

    return 0;
}
static int at91_rtc_suspend(struct device *dev)
{
	/* this IRQ is shared with DBGU and other hardware which isn't
	 * necessarily doing PM like we are...
	 */
	at91_rtc_imr = at91_rtc_read(AT91_RTC_IMR)
			& (AT91_RTC_ALARM|AT91_RTC_SECEV);
	if (at91_rtc_imr) {
		if (device_may_wakeup(dev))
			enable_irq_wake(irq);
		else
			at91_rtc_write(AT91_RTC_IDR, at91_rtc_imr);
	}
	return 0;
}
/*
 * Disable and remove the RTC driver
 */
static int __exit at91_rtc_remove(struct platform_device *pdev)
{
	struct rtc_device *rtc = platform_get_drvdata(pdev);

	/* Disable all interrupts */
	at91_rtc_write(AT91_RTC_IDR, AT91_RTC_ACKUPD | AT91_RTC_ALARM |
					AT91_RTC_SECEV | AT91_RTC_TIMEV |
					AT91_RTC_CALEV);
	free_irq(irq, pdev);

	rtc_device_unregister(rtc);
	platform_set_drvdata(pdev, NULL);

	return 0;
}
Esempio n. 13
0
static void at91_rtc_write_idr(u32 mask)
{
    unsigned long flags;

    spin_lock_irqsave(&at91_rtc_lock, flags);
    at91_rtc_write(AT91_RTC_IDR, mask);
    /*
     * Register read back (of any RTC-register) needed to make sure
     * IDR-register write has reached the peripheral before updating
     * shadow mask.
     *
     * Note that there is still a possibility that the mask is updated
     * before interrupts have actually been disabled in hardware. The only
     * way to be certain would be to poll the IMR-register, which is is
     * the very register we are trying to emulate. The register read back
     * is a reasonable heuristic.
     */
    at91_rtc_read(AT91_RTC_SR);
    at91_rtc_shadow_imr &= ~mask;
    spin_unlock_irqrestore(&at91_rtc_lock, flags);
}