static int copychan_prev(struct ath_hal *ah, struct ieee80211_channel chans[], u_int maxchans, int *nchans, uint16_t freq) { struct ieee80211_channel *c; if (*nchans == 0) return (HAL_EINVAL); if (*nchans >= maxchans) return (HAL_ENOMEM); c = &chans[(*nchans)++]; c[0] = c[-1]; c->ic_freq = freq; /* XXX is it needed here? */ ath_hal_getpowerlimits(ah, c); return (0); }
static int addchan(struct ath_hal *ah, struct ieee80211_channel chans[], u_int maxchans, int *nchans, uint16_t freq, uint32_t flags, REG_DMN_FREQ_BAND *fband, REG_DOMAIN *rd) { struct ieee80211_channel *c; if (*nchans >= maxchans) return (HAL_ENOMEM); c = &chans[(*nchans)++]; c->ic_freq = freq; c->ic_flags = flags; setchannelflags(c, fband, rd); c->ic_maxregpower = fband->powerDfs; ath_hal_getpowerlimits(ah, c); c->ic_maxantgain = fband->antennaMax; return (0); }
static int copychan_prev(struct ath_hal *ah, struct ieee80211_channel chans[], u_int maxchans, int *nchans, uint16_t freq, uint32_t flags) { struct ieee80211_channel *c; if (*nchans == 0) return (HAL_EINVAL); if (*nchans >= maxchans) return (HAL_ENOMEM); HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: %d: freq=%d, flags=0x%08x\n", __func__, *nchans, (int) freq, flags); c = &chans[(*nchans)++]; c[0] = c[-1]; c->ic_freq = freq; /* XXX is it needed here? */ ath_hal_getpowerlimits(ah, c); return (0); }
/* * Construct the channel list for the specified regulatory config. */ static HAL_STATUS getchannels(struct ath_hal *ah, struct ieee80211_channel chans[], u_int maxchans, int *nchans, u_int modeSelect, HAL_CTRY_CODE cc, HAL_REG_DOMAIN regDmn, HAL_BOOL enableExtendedChannels, COUNTRY_CODE_TO_ENUM_RD **pcountry, REG_DOMAIN **prd2GHz, REG_DOMAIN **prd5GHz) { #define CHANNEL_HALF_BW 10 #define CHANNEL_QUARTER_BW 5 #define HAL_MODE_11A_ALL \ (HAL_MODE_11A | HAL_MODE_11A_TURBO | HAL_MODE_TURBO | \ HAL_MODE_11A_QUARTER_RATE | HAL_MODE_11A_HALF_RATE) REG_DOMAIN *rd5GHz, *rd2GHz; u_int modesAvail; const struct cmode *cm; struct ieee80211_channel *ic; int next, b; HAL_STATUS status; HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: cc %u regDmn 0x%x mode 0x%x%s\n", __func__, cc, regDmn, modeSelect, enableExtendedChannels ? " ecm" : ""); status = getregstate(ah, cc, regDmn, pcountry, &rd2GHz, &rd5GHz); if (status != HAL_OK) return status; /* get modes that HW is capable of */ modesAvail = ath_hal_getWirelessModes(ah); /* optimize work below if no 11a channels */ if (isChanBitMaskZero(rd5GHz->chan11a) && (modesAvail & HAL_MODE_11A_ALL)) { HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: disallow all 11a\n", __func__); modesAvail &= ~HAL_MODE_11A_ALL; } next = 0; ic = &chans[0]; for (cm = modes; cm < &modes[N(modes)]; cm++) { uint16_t c, c_hi, c_lo; uint64_t *channelBM = AH_NULL; REG_DMN_FREQ_BAND *fband = AH_NULL,*freqs; int low_adj, hi_adj, channelSep, lastc; uint32_t rdflags; uint64_t dfsMask; uint64_t pscan; if ((cm->mode & modeSelect) == 0) { HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: skip mode 0x%x flags 0x%x\n", __func__, cm->mode, cm->flags); continue; } if ((cm->mode & modesAvail) == 0) { HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: !avail mode 0x%x (0x%x) flags 0x%x\n", __func__, modesAvail, cm->mode, cm->flags); continue; } if (!ath_hal_getChannelEdges(ah, cm->flags, &c_lo, &c_hi)) { /* channel not supported by hardware, skip it */ HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: channels 0x%x not supported by hardware\n", __func__,cm->flags); continue; } switch (cm->mode) { case HAL_MODE_TURBO: case HAL_MODE_11A_TURBO: rdflags = rd5GHz->flags; dfsMask = rd5GHz->dfsMask; pscan = rd5GHz->pscan; if (cm->mode == HAL_MODE_TURBO) channelBM = rd5GHz->chan11a_turbo; else channelBM = rd5GHz->chan11a_dyn_turbo; freqs = ®Dmn5GhzTurboFreq[0]; break; case HAL_MODE_11G_TURBO: rdflags = rd2GHz->flags; dfsMask = rd2GHz->dfsMask; pscan = rd2GHz->pscan; channelBM = rd2GHz->chan11g_turbo; freqs = ®Dmn2Ghz11gTurboFreq[0]; break; case HAL_MODE_11A: case HAL_MODE_11A_HALF_RATE: case HAL_MODE_11A_QUARTER_RATE: case HAL_MODE_11NA_HT20: case HAL_MODE_11NA_HT40PLUS: case HAL_MODE_11NA_HT40MINUS: rdflags = rd5GHz->flags; dfsMask = rd5GHz->dfsMask; pscan = rd5GHz->pscan; if (cm->mode == HAL_MODE_11A_HALF_RATE) channelBM = rd5GHz->chan11a_half; else if (cm->mode == HAL_MODE_11A_QUARTER_RATE) channelBM = rd5GHz->chan11a_quarter; else channelBM = rd5GHz->chan11a; freqs = ®Dmn5GhzFreq[0]; break; case HAL_MODE_11B: case HAL_MODE_11G: case HAL_MODE_11G_HALF_RATE: case HAL_MODE_11G_QUARTER_RATE: case HAL_MODE_11NG_HT20: case HAL_MODE_11NG_HT40PLUS: case HAL_MODE_11NG_HT40MINUS: rdflags = rd2GHz->flags; dfsMask = rd2GHz->dfsMask; pscan = rd2GHz->pscan; if (cm->mode == HAL_MODE_11G_HALF_RATE) channelBM = rd2GHz->chan11g_half; else if (cm->mode == HAL_MODE_11G_QUARTER_RATE) channelBM = rd2GHz->chan11g_quarter; else if (cm->mode == HAL_MODE_11B) channelBM = rd2GHz->chan11b; else channelBM = rd2GHz->chan11g; if (cm->mode == HAL_MODE_11B) freqs = ®Dmn2GhzFreq[0]; else freqs = ®Dmn2Ghz11gFreq[0]; break; default: HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: Unkonwn HAL mode 0x%x\n", __func__, cm->mode); continue; } if (isChanBitMaskZero(channelBM)) continue; /* * Setup special handling for HT40 channels; e.g. * 5G HT40 channels require 40Mhz channel separation. */ hi_adj = (cm->mode == HAL_MODE_11NA_HT40PLUS || cm->mode == HAL_MODE_11NG_HT40PLUS) ? -20 : 0; low_adj = (cm->mode == HAL_MODE_11NA_HT40MINUS || cm->mode == HAL_MODE_11NG_HT40MINUS) ? 20 : 0; channelSep = (cm->mode == HAL_MODE_11NA_HT40PLUS || cm->mode == HAL_MODE_11NA_HT40MINUS) ? 40 : 0; for (b = 0; b < 64*BMLEN; b++) { if (!IS_BIT_SET(b, channelBM)) continue; fband = &freqs[b]; lastc = 0; for (c = fband->lowChannel + low_adj; c <= fband->highChannel + hi_adj; c += fband->channelSep) { if (!(c_lo <= c && c <= c_hi)) { HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: c %u out of range [%u..%u]\n", __func__, c, c_lo, c_hi); continue; } if (next >= maxchans){ HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "%s: too many channels for channel table\n", __func__); goto done; } if ((fband->usePassScan & IS_ECM_CHAN) && !enableExtendedChannels) { HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "skip ecm channel\n"); continue; } #if 0 if ((fband->useDfs & dfsMask) && (cm->flags & IEEE80211_CHAN_HT40)) { /* NB: DFS and HT40 don't mix */ HALDEBUG(ah, HAL_DEBUG_REGDOMAIN, "skip HT40 chan, DFS required\n"); continue; } #endif /* * Make sure that channel separation * meets the requirement. */ if (lastc && channelSep && (c-lastc) < channelSep) continue; lastc = c; OS_MEMZERO(ic, sizeof(*ic)); ic->ic_freq = c; ic->ic_flags = cm->flags; ic->ic_maxregpower = fband->powerDfs; ath_hal_getpowerlimits(ah, ic); ic->ic_maxantgain = fband->antennaMax; if (fband->usePassScan & pscan) ic->ic_flags |= IEEE80211_CHAN_PASSIVE; if (fband->useDfs & dfsMask) ic->ic_flags |= IEEE80211_CHAN_DFS; if (IEEE80211_IS_CHAN_5GHZ(ic) && (rdflags & DISALLOW_ADHOC_11A)) ic->ic_flags |= IEEE80211_CHAN_NOADHOC; if (IEEE80211_IS_CHAN_TURBO(ic) && (rdflags & DISALLOW_ADHOC_11A_TURB)) ic->ic_flags |= IEEE80211_CHAN_NOADHOC; if (rdflags & NO_HOSTAP) ic->ic_flags |= IEEE80211_CHAN_NOHOSTAP; if (rdflags & LIMIT_FRAME_4MS) ic->ic_flags |= IEEE80211_CHAN_4MSXMIT; if (rdflags & NEED_NFC) ic->ic_flags |= CHANNEL_NFCREQUIRED; ic++, next++; } } } done: *nchans = next; /* NB: pcountry set above by getregstate */ if (prd2GHz != AH_NULL) *prd2GHz = rd2GHz; if (prd5GHz != AH_NULL) *prd5GHz = rd5GHz; return HAL_OK; #undef HAL_MODE_11A_ALL #undef CHANNEL_HALF_BW #undef CHANNEL_QUARTER_BW }