void
atw_cardbus_attach(struct device *parent, struct device *self, void *aux)
{
struct atw_cardbus_softc *csc = (void *)self;
struct atw_softc *sc = &csc->sc_atw;
struct cardbus_attach_args *ca = aux;
cardbus_devfunc_t ct = ca->ca_ct;
bus_addr_t adr;
sc->sc_dmat = ca->ca_dmat;
csc->sc_ct = ct;
csc->sc_tag = ca->ca_tag;
/*
* Power management hooks.
*/
sc->sc_enable = atw_cardbus_enable;
sc->sc_disable = atw_cardbus_disable;
sc->sc_power = atw_cardbus_power;
/* Get revision info. */
sc->sc_rev = PCI_REVISION(ca->ca_class);
#if 0
printf(": signature %08x\n%s",
cardbus_conf_read(ct->ct_cc, ct->ct_cf, csc->sc_tag, 0x80),
sc->sc_dev.dv_xname);
#endif
/*
* Map the device.
*/
csc->sc_csr = CARDBUS_COMMAND_MASTER_ENABLE;
if (Cardbus_mapreg_map(ct, ATW_PCI_MMBA,
CARDBUS_MAPREG_TYPE_MEM, 0, &sc->sc_st, &sc->sc_sh, &adr,
&csc->sc_mapsize) == 0) {
#if 0
printf(": atw_cardbus_attach mapped %d bytes mem space\n%s",
csc->sc_mapsize, sc->sc_dev.dv_xname);
#endif
csc->sc_cben = CARDBUS_MEM_ENABLE;
csc->sc_csr |= CARDBUS_COMMAND_MEM_ENABLE;
csc->sc_bar_reg = ATW_PCI_MMBA;
csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_MEM;
} else if (Cardbus_mapreg_map(ct, ATW_PCI_IOBA,
CARDBUS_MAPREG_TYPE_IO, 0, &sc->sc_st, &sc->sc_sh, &adr,
&csc->sc_mapsize) == 0) {
#if 0
printf(": atw_cardbus_attach mapped %d bytes I/O space\n%s",
csc->sc_mapsize, sc->sc_dev.dv_xname);
#endif
csc->sc_cben = CARDBUS_IO_ENABLE;
csc->sc_csr |= CARDBUS_COMMAND_IO_ENABLE;
csc->sc_bar_reg = ATW_PCI_IOBA;
csc->sc_bar_val = adr | CARDBUS_MAPREG_TYPE_IO;
} else {
printf(": unable to map device registers\n");
return;
}
/*
* Bring the chip out of powersave mode and initialize the
* configuration registers.
*/
atw_cardbus_setup(csc);
/* Remember which interrupt line. */
csc->sc_intrline = ca->ca_intrline;
printf(": revision %d.%d: irq %d\n",
(sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf, csc->sc_intrline);
#if 0
/*
* The CardBus cards will make it to store-and-forward mode as
* soon as you put them under any kind of load, so just start
* out there.
*/
sc->sc_txthresh = 3; /* TBD name constant */
#endif
/*
* Finish off the attach.
*/
atw_attach(sc);
ATW_WRITE(sc, ATW_FER, ATW_FER_INTR);
/*
* Power down the socket.
*/
Cardbus_function_disable(csc->sc_ct);
}
static void
atw_pci_attach(device_t parent, device_t self, void *aux)
{
struct atw_pci_softc *psc = device_private(self);
struct atw_softc *sc = &psc->psc_atw;
struct pci_attach_args *pa = aux;
pci_chipset_tag_t pc = pa->pa_pc;
const char *intrstr = NULL;
bus_space_tag_t iot, memt;
bus_space_handle_t ioh, memh;
int ioh_valid, memh_valid;
const struct atw_pci_product *app;
int error;
sc->sc_dev = self;
psc->psc_pc = pa->pa_pc;
psc->psc_pcitag = pa->pa_tag;
app = atw_pci_lookup(pa);
if (app == NULL) {
printf("\n");
panic("atw_pci_attach: impossible");
}
/*
* Get revision info, and set some chip-specific variables.
*/
sc->sc_rev = PCI_REVISION(pa->pa_class);
printf(": %s, revision %d.%d\n", app->app_product_name,
(sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
/* power up chip */
if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self,
NULL)) && error != EOPNOTSUPP) {
aprint_error_dev(self, "cannot activate %d\n", error);
return;
}
/*
* Map the device.
*/
ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA,
PCI_MAPREG_TYPE_IO, 0,
&iot, &ioh, NULL, NULL) == 0);
memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA,
PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
&memt, &memh, NULL, NULL) == 0);
if (memh_valid) {
sc->sc_st = memt;
sc->sc_sh = memh;
} else if (ioh_valid) {
sc->sc_st = iot;
sc->sc_sh = ioh;
} else {
printf(": unable to map device registers\n");
return;
}
sc->sc_dmat = pa->pa_dmat;
/*
* Make sure bus mastering is enabled.
*/
pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
PCI_COMMAND_MASTER_ENABLE);
/*
* Get the cacheline size.
*/
sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
PCI_BHLC_REG));
/*
* Get PCI data moving command info.
*/
if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */
sc->sc_flags |= ATWF_MRL;
if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */
sc->sc_flags |= ATWF_MRM;
if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */
sc->sc_flags |= ATWF_MWI;
/*
* Map and establish our interrupt.
*/
if (pci_intr_map(pa, &psc->psc_ih)) {
aprint_error_dev(self, "unable to map interrupt\n");
return;
}
intrstr = pci_intr_string(pc, psc->psc_ih);
psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET,
atw_intr, sc);
if (psc->psc_intrcookie == NULL) {
aprint_error_dev(self, "unable to establish interrupt");
if (intrstr != NULL)
aprint_error(" at %s", intrstr);
aprint_error("\n");
return;
}
aprint_normal_dev(self, "interrupting at %s\n", intrstr);
/*
* Bus-independent attach.
*/
atw_attach(sc);
if (pmf_device_register1(sc->sc_dev, atw_pci_suspend, atw_pci_resume,
atw_shutdown))
pmf_class_network_register(sc->sc_dev, &sc->sc_if);
else
aprint_error_dev(sc->sc_dev,
"couldn't establish power handler\n");
/*
* Power down the socket.
*/
pmf_device_suspend(sc->sc_dev, &sc->sc_qual);
}
