int avr32_jtag_read_regs(struct avr32_jtag *jtag_info, uint32_t *regs)
{
int i, retval;
/* read core registers */
for (i = 0; i < AVR32NUMCOREREGS - 1; i++)
avr32_jtag_read_reg(jtag_info, i, regs + i);
/* read status register */
retval = avr32_jtag_exec(jtag_info, MFSR(0, 0));
if (retval != ERROR_OK)
return retval;
retval = avr32_jtag_read_reg(jtag_info, 0, regs + AVR32_REG_SR);
return retval;
}
int avr32_jtag_write_regs(struct avr32_jtag *jtag_info, uint32_t *regs)
{
int i, retval;
retval = avr32_jtag_write_reg(jtag_info, 0, regs[AVR32_REG_SR]);
/* Restore Status reg */
retval = avr32_jtag_exec(jtag_info, MTSR(0, 0));
if (retval != ERROR_OK)
return retval;
/*
* And now the rest of registers
*/
for (i = 0; i < AVR32NUMCOREREGS - 1; i++)
avr32_jtag_write_reg(jtag_info, i, regs[i]);
return ERROR_OK;
}
static int avr32_jtag_write_reg(struct avr32_jtag *jtag_info, int reg,
uint32_t val)
{
int retval;
uint32_t dcsr;
/* Restore Status reg */
retval = avr32_jtag_nexus_write(jtag_info,
AVR32_OCDREG_DCEMU, val);
if (retval != ERROR_OK)
return retval;
retval = avr32_jtag_exec(jtag_info, MFDR(reg, AVR32_OCDREG_DCEMU));
if (retval != ERROR_OK)
return retval;
do {
retval = avr32_jtag_nexus_read(jtag_info,
AVR32_OCDREG_DCSR, &dcsr);
} while (!(dcsr & OCDREG_DCSR_EMUD) && (retval == ERROR_OK));
return retval;
}
static int avr32_jtag_read_reg(struct avr32_jtag *jtag_info, int reg,
uint32_t *val)
{
int retval;
uint32_t dcsr;
retval = avr32_jtag_exec(jtag_info, MTDR(AVR32_OCDREG_DCCPU, reg));
if (retval != ERROR_OK)
return retval;
do {
retval = avr32_jtag_nexus_read(jtag_info,
AVR32_OCDREG_DCSR, &dcsr);
if (retval != ERROR_OK)
return retval;
} while (!(dcsr & OCDREG_DCSR_CPUD));
retval = avr32_jtag_nexus_read(jtag_info,
AVR32_OCDREG_DCCPU, val);
return retval;
}
static int avr32_ap7k_resume(struct target *target, int current,
uint32_t address, int handle_breakpoints, int debug_execution)
{
struct avr32_ap7k_common *ap7k = target_to_ap7k(target);
struct breakpoint *breakpoint = NULL;
uint32_t resume_pc;
int retval;
if (target->state != TARGET_HALTED) {
LOG_WARNING("target not halted");
return ERROR_TARGET_NOT_HALTED;
}
if (!debug_execution) {
target_free_all_working_areas(target);
/*
avr32_ap7k_enable_breakpoints(target);
avr32_ap7k_enable_watchpoints(target);
*/
}
/* current = 1: continue on current pc, otherwise continue at <address> */
if (!current) {
#if 0
if (retval != ERROR_OK)
return retval;
#endif
}
resume_pc = buf_get_u32(ap7k->core_cache->reg_list[AVR32_REG_PC].value, 0, 32);
avr32_ap7k_restore_context(target);
/* the front-end may request us not to handle breakpoints */
if (handle_breakpoints) {
/* Single step past breakpoint at current address */
breakpoint = breakpoint_find(target, resume_pc);
if (breakpoint) {
LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
#if 0
avr32_ap7k_unset_breakpoint(target, breakpoint);
avr32_ap7k_single_step_core(target);
avr32_ap7k_set_breakpoint(target, breakpoint);
#endif
}
}
#if 0
/* enable interrupts if we are running */
avr32_ap7k_enable_interrupts(target, !debug_execution);
/* exit debug mode */
mips_ejtag_exit_debug(ejtag_info);
#endif
retval = avr32_ocd_clearbits(&ap7k->jtag, AVR32_OCDREG_DC,
OCDREG_DC_DBR);
if (retval != ERROR_OK)
return retval;
retval = avr32_jtag_exec(&ap7k->jtag, RETD);
if (retval != ERROR_OK)
return retval;
target->debug_reason = DBG_REASON_NOTHALTED;
/* registers are now invalid */
register_cache_invalidate(ap7k->core_cache);
if (!debug_execution) {
target->state = TARGET_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
LOG_DEBUG("target resumed at 0x%" PRIx32 "", resume_pc);
} else {
target->state = TARGET_DEBUG_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
LOG_DEBUG("target debug resumed at 0x%" PRIx32 "", resume_pc);
}
return ERROR_OK;
}
