static void b44_init_hw(struct b44 *bp) { u32 val; b44_chip_reset(bp); b44_phy_reset(bp); b44_setup_phy(bp); /* Enable CRC32, set proper LED modes and power on PHY */ bw32(bp, B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL); bw32(bp, B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT)); /* This sets the MAC address too. */ __b44_set_rx_mode(bp->dev); /* MTU + eth header + possible VLAN tag + struct rx_header */ bw32(bp, B44_RXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN); bw32(bp, B44_TXMAXLEN, bp->dev->mtu + ETH_HLEN + 8 + RX_HEADER_LEN); bw32(bp, B44_TX_WMARK, 56); /* XXX magic */ bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE); bw32(bp, B44_DMATX_ADDR, bp->tx_ring_dma + bp->dma_offset); bw32(bp, B44_DMARX_CTRL, (DMARX_CTRL_ENABLE | (bp->rx_offset << DMARX_CTRL_ROSHIFT))); bw32(bp, B44_DMARX_ADDR, bp->rx_ring_dma + bp->dma_offset); bw32(bp, B44_DMARX_PTR, bp->rx_pending); bp->rx_prod = bp->rx_pending; bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ); val = br32(bp, B44_ENET_CTRL); bw32(bp, B44_ENET_CTRL, (val | ENET_CTRL_ENABLE)); }
/** Close network device * * @v netdev Network device */ static void b44_close(struct net_device *netdev) { struct b44_private *bp = netdev_priv(netdev); b44_chip_reset(bp, B44_FULL_RESET); b44_free_tx_ring(bp); b44_free_rx_ring(bp); }
/** * called by b44_poll in the error path */ static void b44_halt(struct b44_private *bp) { /* disable ints */ bw32(bp, B44_IMASK, 0); bflush(bp, B44_IMASK, 1); DBG("b44: powering down PHY\n"); bw32(bp, B44_MAC_CTRL, MAC_CTRL_PHY_PDOWN); /* * Now reset the chip, but without enabling * the MAC&PHY part of it. * This has to be done _after_ we shut down the PHY */ b44_chip_reset(bp, B44_CHIP_RESET_PARTIAL); }
/* * Called at device open time to get the chip ready for * packet processing. * * Called-by: b44_open */ static void b44_init_hw(struct b44_private *bp, int reset_kind) { u32 val; #define CTRL_MASK (DMARX_CTRL_ENABLE | (RX_PKT_OFFSET << DMARX_CTRL_ROSHIFT)) b44_chip_reset(bp, B44_CHIP_RESET_FULL); if (reset_kind == B44_FULL_RESET) { b44_phy_reset(bp); } /* Enable CRC32, set proper LED modes and power on PHY */ bw32(bp, B44_MAC_CTRL, MAC_CTRL_CRC32_ENAB | MAC_CTRL_PHY_LEDCTRL); bw32(bp, B44_RCV_LAZY, (1 << RCV_LAZY_FC_SHIFT)); /* This sets the MAC address too. */ b44_set_rx_mode(bp->netdev); /* MTU + eth header + possible VLAN tag + struct rx_header */ bw32(bp, B44_RXMAXLEN, B44_MAX_MTU + ETH_HLEN + 8 + RX_HEADER_LEN); bw32(bp, B44_TXMAXLEN, B44_MAX_MTU + ETH_HLEN + 8 + RX_HEADER_LEN); bw32(bp, B44_TX_HIWMARK, TX_HIWMARK_DEFLT); if (reset_kind == B44_PARTIAL_RESET) { bw32(bp, B44_DMARX_CTRL, CTRL_MASK); } else { bw32(bp, B44_DMATX_CTRL, DMATX_CTRL_ENABLE); bw32(bp, B44_DMATX_ADDR, VIRT_TO_B44(bp->tx)); bw32(bp, B44_DMARX_CTRL, CTRL_MASK); bw32(bp, B44_DMARX_ADDR, VIRT_TO_B44(bp->rx)); bw32(bp, B44_DMARX_PTR, B44_RX_RING_LEN_BYTES); bw32(bp, B44_MIB_CTRL, MIB_CTRL_CLR_ON_READ); } val = br32(bp, B44_ENET_CTRL); bw32(bp, B44_ENET_CTRL, (val | ENET_CTRL_ENABLE)); #undef CTRL_MASK }
/** * Probe device * * @v pci PCI device * @v id Matching entry in ID table * @ret rc Return status code */ static int b44_probe(struct pci_device *pci, const struct pci_device_id *id) { struct net_device *netdev; struct b44_private *bp; int rc; /* * Bail out if more than 1GB of physical RAM is installed. * This limitation will be removed later when dma mapping * is merged into mainline. */ if (!phys_ram_within_limit(B44_30BIT_DMA_MASK)) { DBG("Sorry, this version of the driver does not\n" "support systems with more than 1GB of RAM.\n"); return -ENOMEM; } /* Set up netdev */ netdev = alloc_etherdev(sizeof(*bp)); if (!netdev) return -ENOMEM; netdev_init(netdev, &b44_operations); pci_set_drvdata(pci, netdev); netdev->dev = &pci->dev; /* Set up private data */ bp = netdev_priv(netdev); memset(bp, 0, sizeof(*bp)); bp->netdev = netdev; bp->pci = pci; /* Map device registers */ bp->regs = ioremap(pci->membase, B44_REGS_SIZE); if (!bp->regs) { netdev_put(netdev); return -ENOMEM; } /* Enable PCI bus mastering */ adjust_pci_device(pci); b44_load_mac_and_phy_addr(bp); /* Link management currently not implemented */ netdev_link_up(netdev); rc = register_netdev(netdev); if (rc != 0) { iounmap(bp->regs); netdev_put(netdev); return rc; } b44_chip_reset(bp, B44_CHIP_RESET_FULL); DBG("b44 %s (%04x:%04x) regs=%p MAC=%s\n", id->name, id->vendor, id->device, bp->regs, eth_ntoa(netdev->ll_addr)); return 0; }
/* bp->lock is held. */ static void b44_halt(struct b44 *bp) { b44_disable_ints(bp); b44_chip_reset(bp); }