/**
* Check if a BAM pipe is enabled.
*
*/
int bam_pipe_is_enabled(void *base, u32 pipe)
{
return bam_read_reg_field(base, P_CTRL(pipe), P_EN);
}
/**
* Get read offset for a BAM pipe
*
*/
u32 bam_pipe_get_desc_read_offset(void *base, u32 pipe)
{
return bam_read_reg_field(base, P_SW_OFSTS(pipe), SW_DESC_OFST);
}
/* output the content of selected BAM pipe registers */
void print_bam_pipe_selected_reg(void *virt_addr, u32 pipe_index)
{
void *base = virt_addr;
u32 pipe = pipe_index;
if (base == NULL)
return;
SPS_INFO("\nsps:----- Registers of Pipe %d -----\n", pipe);
SPS_INFO("BAM_P_CTRL: 0x%x\n"
"BAM_P_SYS_MODE: %d\n"
"BAM_P_DIRECTION: %d\n"
#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
"BAM_P_LOCK_GROUP: 0x%x (%d)\n"
#endif
"BAM_P_EE: %d\n"
"BAM_P_IRQ_STTS: 0x%x\n"
"BAM_P_IRQ_STTS_P_TRNSFR_END_IRQ: 0x%x\n"
"BAM_P_IRQ_STTS_P_PRCSD_DESC_IRQ: 0x%x\n"
"BAM_P_IRQ_EN: 0x%x\n"
"BAM_P_PRDCR_SDBNDn_BAM_P_BYTES_FREE: 0x%x (%d)\n"
"BAM_P_CNSMR_SDBNDn_BAM_P_BYTES_AVAIL: 0x%x (%d)\n"
"BAM_P_SW_DESC_OFST: 0x%x\n"
"BAM_P_DESC_FIFO_PEER_OFST: 0x%x\n"
"BAM_P_EVNT_DEST_ADDR: 0x%x\n"
"BAM_P_DESC_FIFO_ADDR: 0x%x\n"
"BAM_P_DESC_FIFO_SIZE: 0x%x (%d)\n"
"BAM_P_DATA_FIFO_ADDR: 0x%x\n"
"BAM_P_DATA_FIFO_SIZE: 0x%x (%d)\n"
"BAM_P_EVNT_GEN_TRSHLD: 0x%x (%d)\n",
bam_read_reg(base, P_CTRL(pipe)),
bam_read_reg_field(base, P_CTRL(pipe), P_SYS_MODE),
bam_read_reg_field(base, P_CTRL(pipe), P_DIRECTION),
#ifdef CONFIG_SPS_SUPPORT_NDP_BAM
bam_read_reg_field(base, P_CTRL(pipe), P_LOCK_GROUP),
bam_read_reg_field(base, P_CTRL(pipe), P_LOCK_GROUP),
#endif
bam_read_reg_field(base, P_TRUST_REG(pipe), BAM_P_EE),
bam_read_reg(base, P_IRQ_STTS(pipe)),
bam_read_reg_field(base, P_IRQ_STTS(pipe),
P_IRQ_STTS_P_TRNSFR_END_IRQ),
bam_read_reg_field(base, P_IRQ_STTS(pipe),
P_IRQ_STTS_P_PRCSD_DESC_IRQ),
bam_read_reg(base, P_IRQ_EN(pipe)),
bam_read_reg_field(base, P_PRDCR_SDBND(pipe),
P_PRDCR_SDBNDn_BAM_P_BYTES_FREE),
bam_read_reg_field(base, P_PRDCR_SDBND(pipe),
P_PRDCR_SDBNDn_BAM_P_BYTES_FREE),
bam_read_reg_field(base, P_CNSMR_SDBND(pipe),
P_CNSMR_SDBNDn_BAM_P_BYTES_AVAIL),
bam_read_reg_field(base, P_CNSMR_SDBND(pipe),
P_CNSMR_SDBNDn_BAM_P_BYTES_AVAIL),
bam_read_reg_field(base, P_SW_OFSTS(pipe), SW_DESC_OFST),
bam_read_reg_field(base, P_EVNT_REG(pipe),
P_DESC_FIFO_PEER_OFST),
bam_read_reg(base, P_EVNT_DEST_ADDR(pipe)),
bam_read_reg(base, P_DESC_FIFO_ADDR(pipe)),
bam_read_reg_field(base, P_FIFO_SIZES(pipe), P_DESC_FIFO_SIZE),
bam_read_reg_field(base, P_FIFO_SIZES(pipe), P_DESC_FIFO_SIZE),
bam_read_reg(base, P_DATA_FIFO_ADDR(pipe)),
bam_read_reg_field(base, P_FIFO_SIZES(pipe), P_DATA_FIFO_SIZE),
bam_read_reg_field(base, P_FIFO_SIZES(pipe), P_DATA_FIFO_SIZE),
bam_read_reg_field(base, P_EVNT_GEN_TRSHLD(pipe),
P_EVNT_GEN_TRSHLD_P_TRSHLD),
bam_read_reg_field(base, P_EVNT_GEN_TRSHLD(pipe),
P_EVNT_GEN_TRSHLD_P_TRSHLD));
}
/**
* Get write offset for a BAM pipe
*
*/
u32 bam_pipe_get_desc_write_offset(void *base, u32 pipe)
{
return bam_read_reg_field(base, P_EVNT_REG(pipe),
P_DESC_FIFO_PEER_OFST);
}
