static int __init hci_uart_init(void)
{
static struct tty_ldisc_ops hci_uart_ldisc;
int err;
BT_INFO("HCI UART driver ver %s", VERSION);
/* Register the tty discipline */
memset(&hci_uart_ldisc, 0, sizeof(hci_uart_ldisc));
hci_uart_ldisc.magic = TTY_LDISC_MAGIC;
hci_uart_ldisc.name = "n_hci";
hci_uart_ldisc.open = hci_uart_tty_open;
hci_uart_ldisc.close = hci_uart_tty_close;
hci_uart_ldisc.read = hci_uart_tty_read;
hci_uart_ldisc.write = hci_uart_tty_write;
hci_uart_ldisc.ioctl = hci_uart_tty_ioctl;
hci_uart_ldisc.poll = hci_uart_tty_poll;
hci_uart_ldisc.receive_buf = hci_uart_tty_receive;
hci_uart_ldisc.write_wakeup = hci_uart_tty_wakeup;
hci_uart_ldisc.owner = THIS_MODULE;
err = tty_register_ldisc(N_HCI, &hci_uart_ldisc);
if (err) {
BT_ERR("HCI line discipline registration failed. (%d)", err);
return err;
}
#ifdef CONFIG_BT_HCIUART_H4
h4_init();
#endif
#ifdef CONFIG_BT_HCIUART_BCSP
bcsp_init();
#endif
#ifdef CONFIG_BT_HCIUART_LL
ll_init();
#endif
#ifdef CONFIG_BT_HCIUART_ATH3K
ath_init();
#endif
#ifdef CONFIG_BT_HCIUART_3WIRE
h5_init();
#endif
#ifdef CONFIG_BT_HCIUART_INTEL
intel_init();
#endif
#ifdef CONFIG_BT_HCIUART_BCM
bcm_init();
#endif
#ifdef CONFIG_BT_HCIUART_QCA
qca_init();
#endif
#ifdef CONFIG_BT_HCIUART_AG6XX
ag6xx_init();
#endif
return 0;
}
/// \cond
int main(int argc, char **argv)
{
int fd;
char *s;
unsigned char ope_code;
unsigned char prev_code;
unsigned char data_size;
unsigned char prev_size;
int len;
int baud;
char ret;
printf("bcm2835_for_java ver1.01 start priority=%d\n", nice(1) );
if( argc != 2 )
{
printf("bcm2835_for_java needs 1 parameter like as /tmp/shared_mem\n");
exit ( -1 );
}
else
{
fd = open( argv[1], O_RDWR);
if( fd == -1 )
{
printf("file %s can't open\n",argv[1]);
exit(-1);
}
else
{
s = mmap(0, 4096, PROT_READ | PROT_WRITE, MAP_SHARED, fd, 0);
if( s == MAP_FAILED )
{
printf("we can't create mapping file\n");
}
}
}
r_buff = (struct ring_buff *)s;
w_buff = (struct ring_buff *)(s+sizeof(struct ring_buff) );
bi_send_buff = (char *)( s + 2*sizeof(struct ring_buff) );
bi_rec_buff = (char *)( bi_send_buff + TEMP_BUFF_SIZE );
sync_code = (int *)( bi_rec_buff + TEMP_BUFF_SIZE );
reply_code = (int *)( sync_code + 1 );
init_ring_buff(w_buff,WRITER_INIT);
init_ring_buff(r_buff,READER_INIT);
bi_status = STATUS_FINE;
while( 1 )
{
if( calc_data_size( r_buff ) != 0 )
{
prev_code = ope_code;
prev_size = data_size;
get_ope_code();
ope_code = buff[0];
data_size = calc_data_size( r_buff );
switch( ope_code )
{
case OPE_INIT:
bcm_init();
break;
case OPE_CLOSE:
bcm_close();
break;
case OPE_SET_DEBUG:
ope_set_debug();
break;
case OPE_PERI_READ:
ope_peri_read();
break;
case OPE_PERI_READ_NB:
ope_peri_read_nb();
break;
case OPE_PERI_WRITE:
ope_peri_write();
break;
case OPE_PERI_WRITE_NB:
ope_peri_write_nb();
break;
case OPE_PERI_SET_BITS:
ope_peri_set_bits();
break;
case OPE_GPIO_FSEL:
ope_gpio_fsel();
break;
case OPE_GPIO_SET:
ope_gpio_set();
break;
case OPE_GPIO_CLR:
ope_gpio_clr();
break;
case OPE_GPIO_SET_MULTI:
ope_gpio_set_multi();
break;
case OPE_GPIO_CLR_MULTI:
ope_gpio_clr_multi();
break;
case OPE_GPIO_LEV:
ope_gpio_lev();
break;
case OPE_GPIO_EDS:
ope_gpio_eds();
break;
case OPE_GPIO_SET_EDS:
ope_gpio_set_eds();
break;
case OPE_GPIO_REN:
ope_gpio_ren();
break;
case OPE_GPIO_CLR_REN:
ope_gpio_clr_ren();
break;
case OPE_GPIO_FEN:
ope_gpio_fen();
break;
case OPE_GPIO_CLR_FEN:
ope_gpio_clr_fen();
break;
case OPE_GPIO_HEN:
ope_gpio_hen();
break;
case OPE_GPIO_CLR_HEN:
ope_gpio_clr_hen();
break;
case OPE_GPIO_LEN:
ope_gpio_len();
break;
case OPE_GPIO_CLR_LEN:
ope_gpio_clr_len();
break;
case OPE_GPIO_AREN:
ope_gpio_aren();
break;
case OPE_GPIO_CLR_AREN:
ope_gpio_clr_aren();
break;
case OPE_GPIO_AFEN:
ope_gpio_afen();
break;
case OPE_GPIO_CLR_AFEN:
ope_gpio_clr_afen();
break;
case OPE_GPIO_PUD:
ope_gpio_pud();
break;
case OPE_GPIO_PUDCLK:
ope_gpio_pudclk();
break;
case OPE_GPIO_WRITE:
ope_gpio_write();
break;
case OPE_GPIO_PAD:
ope_gpio_pad();
break;
case OPE_GPIO_SET_PAD:
ope_gpio_set_pad();
break;
case OPE_DELAY:
ope_delay();
break;
case OPE_DELAYMICROSECONDS:
ope_delaymicroseconds();
break;
case OPE_GPIO_WRITE_MULTI:
ope_gpio_write_multi();
break;
case OPE_GPIO_WRITE_MASK:
ope_gpio_write_mask();
break;
case OPE_GPIO_SET_PUD:
ope_gpio_set_pud();
break;
case OPE_SPI_BEGIN:
ope_spi_begin();
break;
case OPE_SPI_END:
ope_spi_end();
break;
case OPE_SPI_SETBITORDER:
ope_spi_setbitorder();
break;
case OPE_SPI_SETCLOCKDIVIDER:
ope_spi_setclockdivider();
break;
case OPE_SPI_SETDATAMODE:
ope_spi_setdatamode();
break;
case OPE_SPI_CHIPSELECT:
ope_spi_chipselect();
break;
case OPE_SPI_SETCHIPSELECTPOLARITY:
ope_spi_setchipselectpolarity();
break;
case OPE_SPI_TRANSFER:
ope_spi_transfer();
break;
case OPE_SPI_TRANSFERNB:
ope_spi_transfernb();
break;
case OPE_SPI_TRANSFERN:
ope_spi_transfern();
break;
case OPE_SPI_WRITENB:
ope_spi_writenb();
break;
case OPE_I2C_BEGIN:
ope_i2c_begin();
break;
case OPE_I2C_END:
ope_i2c_end();
break;
case OPE_I2C_SETSLAVEADDRESS:
ope_i2c_setslaveaddress();
break;
case OPE_I2C_SETCLOCKDIVIDER:
ope_i2c_setclockdivider();
break;
case OPE_I2C_SET_BAUDRATE:
ope_i2c_set_baudrate();
break;
case OPE_I2C_WRITE:
ope_i2c_write();
break;
case OPE_I2C_READ:
ope_i2c_read();
break;
case OPE_I2C_READ_REGISTER_RS:
ope_i2c_read_register_rs();
break;
case OPE_ST_READ:
ope_st_read();
break;
case OPE_ST_DELAY:
ope_st_delay();
break;
case OPE_HELLO:
get_int_code();
len = *(int *)(buff+1);
set_ope_code( OPE_REPLY );
strcpy( bi_rec_buff, "Nice to meet you." );
set_int_code( strlen(bi_rec_buff) );
put_reply();
mark_sync();
usleep(5000);
break;
case OPE_SYNC:
mark_sync();
break;
case OPE_EXIT:
goto BREAK_LINE;
break;
case OPE_OPEN_UART:
open_uart();
break;
case OPE_CONFIG_UART:
configure_uart();
break;
case OPE_SEND_UART:
send_uart();
break;
case OPE_RECEIVE_UART:
receive_uart();
break;
case OPE_CLOSE_UART:
close_uart();
break;
default:
printf("prev_code %02x \n",prev_code);
printf("prev_size %d \n",prev_size);
printf("ope_code error %02x \n",ope_code);
printf("data_size=%d \n",data_size);
break;
}
}
else
{
usleep(5000);
}
}
BREAK_LINE:
printf("Close bcm2835_for_java\n");
exit(0);
}
int
_bcm_switch_warmboot_reset_test(int unit)
{
int rv = BCM_E_NONE;
int warmboot_test_mode_enable;
int no_wb_test;
uint8 is_main;
int test_started = 0;
#ifdef WB_TEST_EPNI_ENABLE
uint32 fld_val;
int device_id;
#endif
BCM_INIT_FUNC_DEFS;
is_main = (sal_thread_self() == sal_thread_main_get());
/* Only main thread will trigger the test. Other threads (linkscan/counter) should not */
if (is_main) {
_bcm_dpp_switch_warmboot_test_mode_get(unit,&warmboot_test_mode_enable);
_bcm_dpp_switch_warmboot_no_wb_test_get(unit,&no_wb_test);
if ((warmboot_test_mode_enable == 1) && (!no_wb_test)) {
BCM_DEBUG((BCM_DBG_VERBOSE), ("Unit:%d Starting warm boot test\n", unit));
/*waiting for warmboot test to finish to avoide recursive calling to _bcm_switch_warmboot_reset_test function*/
_bcm_dpp_switch_warmboot_test_mode_set(unit,0);
rv = bcm_switch_control_set(unit, bcmSwitchControlSync, 1);
test_started = 1;
BCM_IF_ERR_EXIT_MSG(rv, ("Unit:%d warm boot test failed during bcm_switch_control_set\n", unit));
#ifdef INCLUDE_INTR
#if defined(BCM_ARAD_SUPPORT)
rv = rx_los_unit_detach(unit);
BCM_IF_ERR_EXIT_MSG(rv, ("Unit:%d warm boot test failed during appl deint\n", unit));
rv = interrupt_handler_appl_deinit(unit);
BCM_IF_ERR_EXIT_MSG(rv, ("Unit:%d warm boot test failed during appl deint\n", unit));
#endif
#endif
rv = bcm_detach(unit);
BCM_IF_ERR_EXIT_MSG(rv, ("Unit:%d warm boot test failed during bcm detach\n", unit));
rv = soc_deinit(unit);
BCM_IF_ERR_EXIT_MSG(rv, ("Unit:%d warm boot test failed during soc deinit\n", unit));
sal_sleep(1);
/*warmboot on*/
SOC_WARM_BOOT_START(unit);
rv = soc_reset_init(unit);
BCM_IF_ERR_EXIT_MSG(rv, ("Unit:%d warm boot test failed during reset init\n", unit));
rv = bcm_init(unit);
BCM_IF_ERR_EXIT_MSG(rv, ("Unit:%d warm boot test failed during bcm init\n", unit));
#ifdef INCLUDE_INTR
#if defined(BCM_ARAD_SUPPORT)
rv = interrupt_handler_appl_init(unit);
BCM_IF_ERR_EXIT_MSG(rv, ("Unit:%d warm boot test failed during appl init\n", unit));
/*warmboot off*/
SOC_WARM_BOOT_DONE(unit);
{
bcm_pbmp_t pbmp_default;
BCM_PBMP_CLEAR(pbmp_default);
rv = rx_los_unit_attach(unit, pbmp_default, 0);
BCM_IF_ERR_EXIT_MSG(rv, ("Unit:%d warm boot test failed during appl init\n", unit));
}
#endif
/*warmboot off*/
SOC_WARM_BOOT_DONE(unit);
#ifdef WB_TEST_EPNI_ENABLE
/* Set trigger of EPNI credits to other interfaces */
fld_val = 0x7;
device_id = soc_dpp_unit_to_sand_dev_id(unit);
soc_reg32_set(device_id, EPNI_INIT_TXI_CONFIGr,REG_PORT_ANY, 0, fld_val);
#endif
#endif
}
}
exit:
if ( (is_main) && (test_started)) {
/*_bcm_dpp_switch_warmboot_test_mode_get(unit,&warmboot_test_mode_enable);
if (warmboot_test_mode_enable == 0) {*/
if (rv != BCM_E_NONE) {
BCM_DEBUG((BCM_DBG_VERBOSE), ("Unit:%d Warm boot test failed\n", unit));
}else {
BCM_DEBUG((BCM_DBG_VERBOSE), ("Unit:%d Warm boot test finish successfully\n", unit));
}
/*enable warmboot test*/
_bcm_dpp_switch_warmboot_test_mode_set(unit,1);
/*}*/
}
BCM_FUNC_RETURN;
}
bc_error_t bc_build(bc_t *p_bc, uint8_t p_size) {
bcm_init(p_size);
return boolchain_init(p_bc, bools, BC_SIZE, bcm_read, bcm_write);
}