/******************************************************************************* * This function programs EL3 registers and performs other setup to enable entry * into the next image after BL31 at the next ERET. ******************************************************************************/ void bl31_prepare_next_image_entry() { el_change_info_t *next_image_info; uint32_t scr, image_type; /* Determine which image to execute next */ image_type = bl31_get_next_image_type(); /* * Setup minimal architectural state of the next highest EL to * allow execution in it immediately upon entering it. */ bl31_next_el_arch_setup(image_type); /* Program EL3 registers to enable entry into the next EL */ next_image_info = bl31_get_next_image_info(image_type); assert(next_image_info); scr = read_scr(); if (image_type == NON_SECURE) scr |= SCR_NS_BIT; /* * Tell the context mgmt. library to ensure that SP_EL3 points to * the right context to exit from EL3 correctly. */ cm_set_el3_eret_context(next_image_info->security_state, next_image_info->entrypoint, next_image_info->spsr, scr); /* Finally set the next context */ cm_set_next_eret_context(next_image_info->security_state); }
/******************************************************************************* * This function programs EL3 registers and performs other setup to enable entry * into the next image after BL31 at the next ERET. ******************************************************************************/ void bl31_prepare_next_image_entry() { entry_point_info_t *next_image_info; uint32_t scr, image_type; cpu_context_t *ctx; gp_regs_t *gp_regs; /* Determine which image to execute next */ image_type = bl31_get_next_image_type(); /* * Setup minimal architectural state of the next highest EL to * allow execution in it immediately upon entering it. */ bl31_next_el_arch_setup(image_type); /* Program EL3 registers to enable entry into the next EL */ next_image_info = bl31_plat_get_next_image_ep_info(image_type); assert(next_image_info); assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr)); scr = read_scr(); scr &= ~SCR_NS_BIT; if (image_type == NON_SECURE) scr |= SCR_NS_BIT; scr &= ~SCR_RW_BIT; if ((next_image_info->spsr & (1 << MODE_RW_SHIFT)) == (MODE_RW_64 << MODE_RW_SHIFT)) { scr |= SCR_RW_BIT; scr |= SCR_HCE_BIT; } else { scr &= ~(SCR_HCE_BIT); } /* * FIXME: Need a configurable flag when we have hypervisor installed * This is for PSCI CPU_UP api to work correctly * PSCI uses scr.hce to determine the target CPU of CPU_UP * returns to NS world with HYP mode(HCE is set) or SVC mode(HCE is not set) * (refer to psci_set_ns_entry_info() in psci_common.c) * since we don't have hypervisor installed for now, we need to * enter linux with SVC mode. */ // FIXME: For 64bit kernel, we need return to normal world with EL2 // Temporary comment out this to enable 64bit kernel smp. // Need a method to configure this for 32bit/64bit kernel //scr &= ~(SCR_HCE_BIT); /* * Tell the context mgmt. library to ensure that SP_EL3 points to * the right context to exit from EL3 correctly. */ cm_set_el3_eret_context(image_type, next_image_info->pc, next_image_info->spsr, scr); /* * Save the args generated in BL2 for the image in the right context * used on its entry */ ctx = cm_get_context(read_mpidr(), image_type); gp_regs = get_gpregs_ctx(ctx); memcpy(gp_regs, (void *)&next_image_info->args, sizeof(aapcs64_params_t)); /* Finally set the next context */ cm_set_next_eret_context(image_type); }
void bl31_prepare_k64_entry(void) { entry_point_info_t *next_image_info; uint32_t scr, image_type; cpu_context_t *ctx; gp_regs_t *gp_regs; /* Determine which image to execute next */ image_type = NON_SECURE; //bl31_get_next_image_type(); /* * Setup minimal architectural state of the next highest EL to * allow execution in it immediately upon entering it. */ bl31_next_el_arch_setup(image_type); /* Program EL3 registers to enable entry into the next EL */ next_image_info = bl31_plat_get_next_kernel_ep_info(image_type); assert(next_image_info); assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr)); /* check is set 64bit kernel*/ printf("next_image_info->spsr = 0x%llx\n", next_image_info->spsr); scr = read_scr(); scr &= ~SCR_NS_BIT; if (image_type == NON_SECURE) scr |= SCR_NS_BIT; scr &= ~SCR_RW_BIT; if ((next_image_info->spsr & (1 << MODE_RW_SHIFT)) == (MODE_RW_64 << MODE_RW_SHIFT)) { scr |= SCR_RW_BIT; printf("spsr is 64 bit\n"); } scr |= SCR_HCE_BIT; /* * Tell the context mgmt. library to ensure that SP_EL3 points to * the right context to exit from EL3 correctly. */ cm_set_el3_eret_context(image_type, next_image_info->pc, next_image_info->spsr, scr); /* * Save the args generated in BL2 for the image in the right context * used on its entry */ ctx = cm_get_context(read_mpidr(), image_type); gp_regs = get_gpregs_ctx(ctx); memcpy(gp_regs, (void *)&next_image_info->args, sizeof(aapcs64_params_t)); printf("Finally set the next context\n"); /* Finally set the next context */ cm_set_next_eret_context(image_type); }