//*****************************************************************************
//
// Function Name: DISPDRV__Start
// 
// Description:   Configure For Updates
//
//*****************************************************************************
Int32 DISPDRV_Start (struct pi_mgr_dfs_node* dfs_node)
{
    if (brcm_enable_dsi_lcd_clocks(dfs_node,0,
    		DISPDRV_dsiCfg.hsBitClk.clkIn_MHz * 1000000,
                DISPDRV_dsiCfg.hsBitClk.clkInDiv,
                DISPDRV_dsiCfg.escClk.clkIn_MHz   * 1000000 / DISPDRV_dsiCfg.escClk.clkInDiv ))
    {
        LCD_DBG ( LCD_DBG_ERR_ID, "[DISPDRV] %s: ERROR to enable the clock\n",
            __FUNCTION__  );
        return ( -1 );
    }

    return ( 0 );
}
/*
 *
 *  Function Name: DSI_Start
 *
 *  Description:
 *
 */
Int32 DSI_Start(
	DISPDRV_HANDLE_T drvH,
	struct pi_mgr_dfs_node *dfs_node)
{
	DispDrv_PANEL_t *pPanel = (DispDrv_PANEL_t *)drvH;

	if (brcm_enable_dsi_lcd_clocks(dfs_node, pPanel->busNo,
		DispDrv_dsiCfg.hsBitClk.clkIn_MHz * 1000000,
		DispDrv_dsiCfg.hsBitClk.clkInDiv,
		DispDrv_dsiCfg.escClk.clkIn_MHz * 1000000
		/ DispDrv_dsiCfg.escClk.clkInDiv)) {

		DSI_ERR("ERROR enabling the clock\n");
		return -1;
	}

	return 0;
}
//*****************************************************************************
//
// Function Name: DISPDRV__Start
// 
// Description:   Configure For Updates
//
//*****************************************************************************
Int32 DISPDRV_Start(DISPDRV_HANDLE_T drvH, struct pi_mgr_dfs_node *dfs_node)
{
	DISPDRV_PANEL_T *pPanel = (DISPDRV_PANEL_T *)drvH;

	if (brcm_enable_dsi_lcd_clocks(dfs_node, pPanel->busNo,
				       DISPDRV_dsiCfg.hsBitClk.clkIn_MHz *
				       1000000,
				       DISPDRV_dsiCfg.hsBitClk.clkInDiv,
				       DISPDRV_dsiCfg.escClk.clkIn_MHz *
				       1000000 /
				       DISPDRV_dsiCfg.escClk.clkInDiv)) {
		LCD_DBG(LCD_DBG_ERR_ID,
			"[DISPDRV] %s: ERROR to enable the clock\n",
			__FUNCTION__);
		return (-1);
	}

	return (0);
}