/* IRQ3 = L1 interrupt for TP1 */ static void brcm_mips_int3_dispatch(struct pt_regs *regs) { clear_c0_status(STATUSF_IP3); brcm_intc_dispatch(regs, TP1_BASE); set_c0_status(STATUSF_IP3); }
/* IRQ2 = L1 interrupt for TP0 */ static void brcm_mips_int2_dispatch(struct pt_regs *regs) { clear_c0_status(STATUSF_IP2); brcm_intc_dispatch(regs, CPUINT1C); set_c0_status(STATUSF_IP2); }