bool TCPConnection::write(uint8_t *buf, int len) {
if (stopped) {
return false;
}
assert(buf);
assert(len > 0);
boost::shared_array<uint8_t> bufCpy(new uint8_t[len]);
memcpy(bufCpy.get(), buf, len);
pendingWrites.increment();
beetle.writers.schedule(getId(), [this, bufCpy, len] {
uint8_t bufLen = len;
if (SSL_write_all(ssl, &bufLen, 1) != 1 || SSL_write_all(ssl, bufCpy.get(), len) != len) {
if (debug_socket) {
std::stringstream ss;
ss << "socket write failed : " << strerror(errno);
pdebug(ss.str());
}
stopInternal();
} else {
if (debug_socket) {
pdebug("wrote " + std::to_string(len) + " bytes to " + getName());
phex(bufCpy.get(), len);
}
}
pendingWrites.decrement();
});
return true;
}
/*----------------------------------------------------------------------------
MAIN function
*----------------------------------------------------------------------------*/
int main (void) {
uint32_t delay;
SystemInit (); /* initialize the clocks */
/* Expansion statement ----------------------------------------------------- */
// DeInit NVIC and SCBNVIC
NVIC_DeInit();
NVIC_SCBDeInit();
/* Configure the NVIC Preemption Priority Bits:
* two (2) bits of preemption priority, six (6) bits of sub-priority.
* Since the Number of Bits used for Priority Levels is five (5), so the
* actual bit number of sub-priority is three (3)
*/
NVIC_SetPriorityGrouping(0x05);
// Set Vector table offset value
#if (__RAM_MODE__==1)
NVIC_SetVTOR(0x10000000);
#else
NVIC_SetVTOR(0x00000000);
#endif
/* End of Expansion statement ------------------------------------------------ */
pSpi = &spi; /* Select 'spi0' as active communication interface */
/* Note:
* Use own generated SS signal
* on the port number defined by CS_PORT_NUM symbol
* and the pin number defined by CS_PIN_NUM symbol
*/
pSpi->Cfg.SlaveSelect = SpiDev_SSO_DISABLED;
SPI_SlaveSelectInit();
pSpi->Init();
#if __AT25_EXAMPLE__
bufCpy ((uint8_t *)bufTx, (uint8_t *)menu0, sizeof(menu0));
SPI_MemWrite(0x400, 36, (unsigned char*)bufTx);
bufCpy ((uint8_t *)bufTx, (uint8_t *)menu1, sizeof(menu1));
SPI_MemWrite(0x450, 21, (unsigned char*)bufTx);
SPI_MemRead (0x400, 128, (unsigned char*)bufRx);
#endif
#if __SC16IS750_EXAMPLE__
/* First, send some command to reset SC16IS740 chip via SPI bus interface
* note driver /CS pin to low state before transferring by CS_Enable() function
*/
SPI_SlaveSelect(0);
pSpi->BufTxRx ((void *)&iocon_cfg, (void *)&spireadbuf, sizeof (iocon_cfg));
SPI_SlaveSelect(1);
for (delay = 0; delay < 1000000; delay++);
SPI_SlaveSelect(0);
pSpi->BufTxRx ((void *)&iodir_cfg, (void *)&spireadbuf, sizeof (iodir_cfg));
SPI_SlaveSelect(1);
// main loop
while (1)
{
for (delay = 0; delay < 1000000; delay++);
SPI_SlaveSelect(0);
pSpi->BufTxRx ((void *)&iostate_on, (void *)&spireadbuf, sizeof (iostate_on));
SPI_SlaveSelect(1);
for (delay = 0; delay < 1000000; delay++);
SPI_SlaveSelect(0);
pSpi->BufTxRx ((void *)&iostate_off, (void *)&spireadbuf, sizeof (iostate_off));
SPI_SlaveSelect(1);
}
#endif
while (1) ;
}
